Cypress CY7C67200 Power Savings and Reset Description, Power Savings Mode Description, Sleep

CY7C67200

Minimum Hardware Requirements for Standalone Mode – Peripheral Only

Figure 5. Minimum Standalone Hardware Configuration – Peripheral Only

					EZ-OTG
					CY7C67200
				VReg	VCC, AVCC,	nRESET	Reset
							Logic
					BoostVCC
		VBus
Standard-B		D+			DPlus
		D-			DMinus
or Mini-B
		GND
		SHIELD
			Bootstrap Options
			Vcc Vcc
			10k	10k
				GPIO[30]	SCL*
				GPIO[31]	SDA*
					Int. 16k x8
					Code / Data
			VCC	Bootloading Firmware
A0 Up to 64k x8			VCC
A1	EEPROM		WP
A2			SCL		Reserved
GND			SDA				22pf
						XIN
					GND, AGND,
							12MHz
					BoostGND	XOUT
							22pf
*Bootloading begins after POR + 3ms BIOS bootup						* Parallel Resonant
*GPIO[31:30]		31	30				Fundamental Mode
							500uW
Up to 2k x8		SCL	SDA
							20-33pf ±5%
>2k x8 to 64k x8		SDA	SCL

Power Savings and Reset Description

The EZ-OTG modes and reset conditions are described in this section.

Power Savings Mode Description

EZ-OTG has one main power savings mode, Sleep. For detailed information on Sleep mode; See section “Sleep”.

Sleep mode is used for USB applications to support USB suspend and non USB applications as the main chip power down mode.

In addition, EZ-OTG is capable of slowing down the CPU clock speed through the CPU Speed register [0xC008] without affecting other peripheral timing. Reducing the CPU clock speed from 48 MHz to 24 MHz reduces the overall current draw by around 8 mA while reducing it from 48 MHz to 3 MHz reduces the overall current draw by approximately 15 mA.

Sleep

Sleep mode is the main chip power down mode and is also used for USB suspend. Sleep mode is entered by setting the Sleep Enable (bit 1) of the Power Control register [0xC00A]. During Sleep mode (USB Suspend) the following events and states are true:

•GPIO pins maintain their configuration during sleep (in suspend).

•External Memory Address pins are driven low.

•XTALOUT is turned off.

•Internal PLL is turned off.

•Firmware must disable the charge pump (OTG Control register [0xC098]) causing OTGVBUS to drop below 0.2V. Otherwise OTGVBUS will only drop to VCC – (2 schottky diode drops).

•Booster circuit is turned off.

•USB transceivers is turned off.

•CPU suspends until a programmable wakeup event.

Document #: 38-08014 Rev. *G Page 8 of 78

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