Platform Environmental Control Interface Peci | Intel 5400 Series

Thermal/Mechanical Reference Design

smaller foot print and decreased sensitivity to noise. These DTS benefits will result in more accurate fan speed control and TCC activation.The DTS application in fan speed control will be discussed in more detail in Section 2.4.1.

2.2.3Platform Environmental Control Interface (PECI)

The PECI interface is designed specifically to convey system management information from the processor (initially, only thermal data from the Digital Thermal Sensor). It is a proprietary single wire bus between the processor and the chipset or other health monitoring device. The PECI specification provides a specific command set to discover, enumerate devices, and read the temperature. For an overview of the PECI interface, please refer to PECI Feature Set Overview. For more detailed information on PECI, please refer to Platform Environment Control Interface (PECI) Specification and Quad- Core Intel® Xeon® Processor 5400 Series Datasheet.

2.2.4Multiple Core Special Considerations

2.2.4.1Multiple Digital Thermal Sensor Operation

Each Quad-Core Intel® Xeon® Processor 5400 Series can have multiple Digital Thermal Sensors located on the die. Each die within the processor currently maps to a PECI domain. The Quad-Core Intel® Xeon® Processor 5400 Series contains two cores per die (domain) and two domains (die) per socket. BIOS will be responsible for detecting the proper processor type and providing the number of domains to the thermal management system. An external PECI device that is part of the thermal management system polls the processor domains for temperature information and currently receives the highest of the DTS output temperatures within each domain. Figure 2-5provides an illustration of the DTS domains for the Quad-Core Intel® Xeon® Processor 5400 Series.

Figure 2-5. DTS Domain for Quad-Core Intel® Xeon® Processor 5400 Series

Quad-Core Intel® Xeon® Processor 5400 Series TMDG

21

Image 21

Intel 5400 Series manual Platform Environmental Control Interface Peci, Multiple Core Special Considerations

Contents

Thermal/Mechanical Design Guidelines Quad-Core Intel Xeon Processor 5400 Series Quad-Core Intel Xeon Processor 5400 Series Tmdg Contents Figures Preload Test Configuration Tables Initial release of the document Reference Revision Description Date Number Quad-Core Intel Xeon Processor 5400 Series Tmdg Objective ScopeReferences Definition of Terms Terms and Descriptions Sheet 1Term Description TDP Terms and Descriptions Sheet 2 Introduction Processor Mechanical Parameters Mechanical RequirementsProcessor Mechanical Parameters Table Parameter Minimum Maximum Unit Quad-Core Intel Xeon Processor 5400 Series Package Thermal/Mechanical Reference Design Thermal/Mechanical Reference Design Thermal/Mechanical Reference Design Quad-Core Intel Xeon Processor 5400 Series Considerations Thermal Control Circuit and TDP Processor Thermal Parameters and Features Digital Thermal Sensor Platform Environmental Control Interface Peci Multiple Core Special ConsiderationsMultiple Digital Thermal Sensor Operation PROCHOT#, THERMTRIP#, and FORCEPR# Thermal Monitor for Multiple Core ProductsHeatpipe Orientation for Multiple Core Processors Processor Input Processor Output Feature Dimension Processor Core Geometric Center Dimensions Equation 2-1.y = ax + b Thermal Profile Equation 2-2.TCONTROL= -TOFFSET Tcontrol Definition Tcontrol and Thermal Profile Interaction Thermal Profile B Performance Targets Thermal/Mechanical Reference Design Thermal/Mechanical Reference Design Parameter Maximum Unit 2U+ CEK, Thermal Profile a1U CEK, Thermal Profile B Fan Fail Guidelines Sea-Level1U Alternative Heatsink Fan Speed Control Characterizing Cooling Solution Performance Requirements Fan Speed Control, Tcontrol and DTS Relationship Processor Thermal Characterization Parameter RelationshipsEquation 2-3.ΨCA= Tcase TLA / TDP Condition FSC Scheme Equation 2-4.ΨCA= ΨCS + ΨSA Example Chassis Thermal Design Capabilities and Improvements Chassis Thermal Design ConsiderationsEquation 2-5.ΨCA= Tcase TLA / TDP = 68 45 / 85 = 0.27 C/W Equation 2-6.ΨSA= ΨCA − ΨCS = 0.27 − 0.05 = 0.22 C/W Heatsink Solutions Thermal/Mechanical Reference Design ConsiderationsHeatsink Design Considerations Summary Thermal Interface Material Geometric Envelope Assembly Drawing Structural Considerations of CEK 17 U+ CEK Heatsink Thermal Performance Thermal Solution Performance Characteristics Equation 2-8.y = 0.187*X + Thermal Profile Adherence Equation 2-9.y = 0.246*X + =0.187* X +40 Equation 2-10.y = 0.246*X + 1UCEKReference Solution Heatsink with Captive Screws and Standoffs Components Overview 22. Isometric View of the 2U+ CEK Heatsink Recommended Thermal Grease Dispense Weight CEK Heatsink Thermal Mechanical CharacteristicsThermal Interface Material TIM Processor Minimum Maximum Units 24. CEK Spring Isometric View CEK Spring Thermal/Mechanical Reference Design Fan Power Supply Fan Specifications Boxed 4-wire PWM/DTS Heatsink SolutionDescription Min Typ Max Unit Steady Startup Systems Considerations Associated with the Active CEK Boxed Processor Contents Thermal/Mechanical Reference Design Figure A-1. Isometric View of the 1U Alternative Heatsink Component Overview Thermal Solution Performance Characterics Thermal Profile AdherenceEquation A-1. y = 0.331*x + = Processor power value W 1U Alternative Heatsink Thermal/Mechanical Design Drawing Description Table B-1. Mechanical Drawing List Figure B-1 2U CEK Heatsink Sheet 1 Figure B-2 2U CEK Heatsink Sheet 2 Figure B-3 U CEK Heatsink Sheet 3 Figure B-4 2U CEK Heatsink Sheet 4 Figure B-5. CEK Spring Sheet 1 Figure B-6. CEK Spring Sheet 2 Figure B-7. CEK Spring Sheet 3 Mechanical Drawings Mechanical Drawings Mechanical Drawings Mechanical Drawings Mechanical Drawings Mechanical Drawings Figure B-14 U CEK Heatsink Sheet 1 Figure B-15 U CEK Heatsink Sheet 2 Figure B-16 U CEK Heatsink Sheet 3 Figure B-17 U CEK Heatsink Sheet 4 Figure B-18. Active CEK Thermal Solution Volumetric Sheet 1 Figure B-19. Active CEK Thermal Solution Volumetric Sheet 2 Figure B-20. Active CEK Thermal Solution Volumetric Sheet 3 Figure B-21 U Alternative Heatsink 1 Figure B-22 U Alternative Heatsink 2 Figure B-23 U Alternative Heatsink 3 Figure B-24 U Alternative Heatsink 4 Mechanical Drawings Overview Test PreparationHeatsink Preparation Alternate Heatsink Sample Preparation Figure C-3. Preload Test Configuration Time-Zero, Room Temperature Preload Measurement Test Procedure ExamplesTypical Test Equipment Table C-1. Typical Test Equipment Preload Degradation under Bake Conditions Heatsink Clip Load Methodology Safety Requirements Safety Requirements Structural Reliability Testing Environmental Reliability TestingIntel Verification Criteria for the Reference Designs Reference Heatsink Thermal Verification 2.2 Recommended Test Sequence Post-Test Pass CriteriaTable E-1 Use Conditions Environment Material and Recycling Requirements Recommended BIOS/Processor/Memory Test Procedures Quality and Reliability Requirements Supplier Information Intel Enabled Suppliers For 1U Additional Suppliers 2U Heatsink Alternative CEK Copper Fin Alternative CEK Copper Fin Enabled Suppliers Information 100 Quad-Core Intel Xeon Processor 5400 Series Tmdg