GD82559ER — Networkin g Silicon

This feature is not recommended for use in non-cache line oriented systems since it may cause shorter bursts and lower performance.

This feature should be used only when the CLS register in PCI Configuration space is set to 8 or 16 Dwords.

The 82559ER reads all control data structures (including Receive Buffer Descriptors) from the first Dword (even if it is not required) to maintain cache line alignment.

4.2.1.2.3Error Handling

Data Parity Errors: As an initiator, the 82559ER checks and detects data parity errors that occur during a transaction. If the Parity Error Response bit is set (PCI Configuration Command register, bit 6), the 82559ER also asserts PERR# and sets the Data Parity Detected bit (PCI Configuration Status register, bit 8). In addition, if the error was detected by the 82559ER during read cycles, it sets the Detected Parity Error bit (PCI Configuration Status register, bit 15).

4.2.2Clockrun Signal

The CLKRUN# signal is used to control the PCI clock as defined in the PCI Mobile design guide and is compliant with the PCI Mobile design guide. The Clockrun signal is an open drain I/O signal. It is used as a bidirectional channel between the host and the devices.

The host de-asserts the CLKRUN# signal to indicate that the PCI clock is about to be stopped or slowed down to a non-operational frequency.

The host asserts the CLKRUN# signal when the interface clock is either running at a normal operating frequency or about to be started.

The 82559ER asserts the CLKRUN# signal to indicate that it needs the PCI clock to prevent the host from stopping the PCI clock or to request that the host restore the clock if it was previously stopped.

Proper operation requires that the system latency from the nominal PCI CLK to CLKRUN# assertion should be less than 0.5 μs. If the system latency is longer than 0.5 μs, the occurrence of receive overruns increases. For use in these types of systems, the Clockrun functionality should be disabled (see Section 8.1.12, “General Control Register” on page 61 ). In this case, the 82559ER will claim the PCI clock even during idle time. If the CLKRUN# signal is not used, it should be connected to a pull-down resistor (62KΩ). The value of the resistor selected is dependent on the ND-TREE set-up used (i.e. the test fixture must be able to overdrive pull-down).

4.2.3Power Management Event Signal

The 82559ER supports power management indications in the PCI mode. The PME# output pin provides an indication of a power management event to the system. PCI Power Management

In addition to the base functionality of the 82558 B-step, the 82559 family supports a larger set of wake-up packets and the capability to wake the system on a link status change from a low power state. The 82559ER enables the host system to be in a sleep state and remain virtually connected to the network. After a power management event or link status change is detected, the 82559ER will wake the host system. The sections below describe these events, the 82559ER power states, and estimated power consumption at each power state.

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Datasheet

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Intel GD82559ER manual Clockrun Signal, Power Management Event Signal

GD82559ER specifications

The Intel GD82559ER is a highly regarded network interface controller (NIC) designed for use in various computing environments, primarily for stable connectivity in both desktop and server applications. Released as part of the 82559 family of Ethernet controllers, the GD82559ER features advanced technologies that enhance performance, reliability, and manageability.

One of the standout features of the 82559ER is its ability to support both 10/100 Mbps Ethernet. This dual capability allows the controller to operate in a wide range of network settings, making it adaptable to legacy systems while also providing support for modern Ethernet standards. This versatility is crucial for organizations looking to maintain operational effectiveness without the need for immediate upgrades to their existing infrastructure.

The GD82559ER employs a PCI interface, which allows it to connect with various devices and motherboards easily, making it a go-to choice for manufacturers aiming for integration in their systems. It also includes features like Auto-Negotiation, enabling the NIC to automatically detect and select the appropriate speed and duplex mode for optimal performance. This capability is essential in dynamic networking environments, where devices from various generations coexist.

Power management is another critical aspect of the GD82559ER. The controller supports advanced power-saving features like PCI Power Management, reducing energy consumption during low-usage periods. This not only contributes to lower operational costs but also aligns with modern eco-friendly initiatives in technology.

Additionally, the GD82559ER comes equipped with advanced diagnostics and monitoring capabilities. This enhances the network's manageability by allowing administrators to track performance metrics and diagnose issues effectively. Through its onboard diagnostics, the controller aids in ensuring a stable network connection, allowing for timely interventions when issues arise.

The controller is also designed with a robust architecture that supports various operating systems, facilitating a broad implementation across different platforms. As a result, the GD82559ER has become a reliable option for system builders and enterprises focused on building dependable networking solutions.

Overall, the Intel GD82559ER is a versatile, high-performance network interface controller that continues to serve as a foundational component for computer systems that require efficient, reliable networking capabilities. Its combination of technologies and features makes it a popular choice in diverse computing environments.