Networking Silicon — GD82559ER
9.3.8 | Register 23: | |||||
| Counter Bit Definitions |
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| Bit(s) | Name | Description | Default | R/W |
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| 15:0 | Premature End of | This field contains a | RO | |
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| Frame | each premature end of frame event. The counter |
| SC |
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| freezes when full and |
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9.3.9 | Register 24: |
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| Definitions |
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| Bit(s) | Name | Description | Default | R/W |
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| 15:0 | End of Frame | This is a | RO | |
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| Counter | of frame error event. The counter freezes when full |
| SC |
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9.3.10 | Register 25: |
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| Definitions |
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| Bit(s) | Name | Description | Default | R/W |
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| 15:0 | Jabber Detect | This is a | RO | |
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| Counter | jabber detection event. The counter freezes when full |
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9.3.11 | Register 26: Equalizer Control and Status Bit Definitions |
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| Bit(s) | Name | Description |
| Default | R/W |
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| 15:0 | RFU | Reserved for Future Use |
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Bit(s) | Name |
| Description | Default | R/W | |
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15:3 | Reserved | These bits are reserved and should be set to 0b. | 0 | RW | ||
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2:0 | LED Switch | Value | ACTLED | LILED | 000 | RW |
| Control | 000 | Activity | Link |
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| 001 | Speed | Collision |
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| 010 | Speed | Link |
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| 011 | Activity | Collision |
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| 100 | Off | Off |
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| 101 | Off | On |
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| 110 | On | Off |
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| 111 | On | On |
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Datasheet | 71 |