Mitsubishi Electronics FR-A700, 700 Series specifications Function block diagram, Cpu

System Configuration

2.1.2Function block diagram

How I/O data are transferred to/from the inverter in CC-Link will be described using function blocks.

(1)Between the master station and inverter in the CC-Link system, link refresh is always made at 3.5 to 18ms (512 points).

(2)I/O refresh and master station's sequence program are executed asynchronously.

(3)Data read from the inverter are read from the buffer memory of the CC-Link system master/local module using the FROM instruction.

(4)Data to be written to the inverter are written to the buffer memory of the CC-Link system master/local module using the TO instruction.

PLC CPU

1)CC-Link module I/O signals

2)Buffer memory read/write

Interface with PLC

CC-Link module

CPU

Buffer memory

CC-Link interface

3)CC-Link dedicated cable

CC-Link interface

	Inverter
4)	program	I/O
		5)
	Built-in sequence	data

Inverter CPU

Input signal

Output signal

1)I/O signals assigned to the CC-Link system master/local module. These signals are used to make communication between the PLC CPU and CC-Link system master/local module.

2)Input data from the inverter can be read, and output data from the inverter can be written. Buffer memory read/write is performed using the FROM/TO instruction of the sequence program. Refer to page 57 for details of the buffer memory.

3)PLC link start is commanded from the sequence program. After PLC link has started, link refresh is always made asynchronously with the sequence program execution.

4)I/O data are transferred between the CC-Link system master/local module and inverter CPU via the sequence program.

5)I/O data are transferred between the inverter CPU and sequence program. (5) indicates the operation performed when CC-Link is not used, and is irrelevant to 1) to 4).)

REMARKS

Programs cannot be read/written via CC-Link communication.

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CC-Link COMMUNICATION

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