TMS320 SECOND-GENERATION

DEVICES

SPRS010B Ð MAY 1987 Ð REVISED NOVEMBER 1990

Key Features: TMS32020

+5 V

GND

• 200-ns Instruction Cycle Time

•544 Words of On-Chip Data RAM

• 128K Words of Total Data/Program

Interrupts

256-Word

288-Word

Data (16)

 

Data/Prog

Data

Memory Space

 

 

 

RAM

RAM

Multi-

• Wait States for Communication to Slower Off-Chip

 

 

Multiplier

Processor

Memories

 

 

 

Interface

• Source Code Compatible With the TMS320C1x

 

 

 

 

32-BIT ALU/ACC

Serial

• Single-Cycle Multiply/Accumulate Instructions

 

 

 

 

 

Shifters

Interface

• Repeat Instructions

 

 

 

 

 

Address (16)

• Global Data Memory Interface

 

Timer

 

• Block Moves for Data/Program Management

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

• Five Auxiliary Registers With Dedicated

• On-Chip Clock Generator

Arithmetic Unit

• Single 5-V Supply

• Serial Port for Multiprocessing or Interfacing

• NMOS Technology

to Codecs, Serial Analog-to-Digital

Converters, etc.

• 68-Pin Grid Array (PGA) Package

 

Key Features: TMS320C25, TMS320C25-50, TMS320E25

 

 

 

 

 

• 80-ns Instruction Cycle Time (TMS320C25-50)

• 100-ns Instruction Cycle Time (TMS320C25)

• 4K Words of On-Chip Secure Program EPROM

(TMS320E25)

• 4K Words of On-Chip Program

ROM (TMS320C25)

• 544 Words of On-Chip RAM

• 128K Words of Total Program/Data

Memory Space

• Wait States for Communications to

Slower Off-Chip Memories

• Object-Code Compatible With the TMS32020

• Source-Code Compatible With TMS320C1x

• 24 Additional Instructions to Support

Interrupts

MP/MC

+5 V

GND

256-Word 288-Word

Data/Prog Data

RAM RAM

4K-Words

ROM/EPROM

Multiplier

32-Bit ALU/ACC

Shifters

Timer

Data (16)

Multi-

Processor

Interface

Serial

Interface

Address (16)

Adaptive Filtering, FFTs, and

Extended-Precision Arithmetic

• Block Moves for Data/Program Management

• Single-Cycle Multiply/Accumulate Instructions

• Eight Auxiliary Registers With Dedicated

Arithmetic Unit

• Bit-Reversed Indexed-Addressing Mode for

Radix-2 FFTS

• Double-Buffered Serial Port

•On-Chip Clock Generator

•Single 5-V Supply

•Internal Security Mechanism (TMS320E25)

•68-to-28 Pin Conversion Adapter Socket

•CMOS Technology

•68-Pin Grid Array (PGA) Package (TMS320C25)

•68-Lead Plastic Leaded Chip Carrier (PLCC) Package (TMS320C25, TMS320C25-50)

•68-Lead CER-QUAD Package (TMS320E25)

4

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001

Page 4
Image 4
Texas Instruments Key Features TMS32020, Memory Space, Wait States for Communication to Slower Off-Chip, Memories