Fcrystal | Texas Instruments TMS320 instruction

TMS320C25-50

SPRS010B Ð MAY 1987 Ð REVISED NOVEMBER 1990

TMS320C25

CLKIN

	+5 V	fcrystal
		fcrystal
	10 kΩ
	74HC04	4.7 kΩ
F11		4.7 kΩ
F11
	47 pF	74AS04
		74AS04

10 kΩ

	fcrystal, (MHz)	L, (∝H)
TMS320C25	40.96	1.8
TMS320C25-50	51.20	1.0
TMS320E25	40.96	1.8

C = 20 pF

0.1∝F

L

ADVANCE INFORMATION

Figure 7. External Clock Option

timing requirements over recommended operating conditions (see Note 3)

				MIN	NOM MAX	UNIT

	tc(CI)	CLKIN cycle time		19.5	150	ns
	tc(CI)	CLKIN cycle time		3	150	ns
				3

	t	CLKIN fall time			5 ²	ns
	f(CI)
	t	CLKIN rise time			5²	ns
	r(CI)
	tw(CIL)	CLKIN low pulse duration, tc(CI) = 50 ns (see Note 4)		20		ns
	tw(CIH)	CLKIN high pulse duration, tc(CI) = 50 ns (see Note 4)		20		ns
	tsu(S)		setup time before CLKIN low	4	Q ± 4	ns
	tsu(S)	SYNC	setup time before CLKIN low	4	Q ± 4	ns
	th(S)		hold time from CLKIN low	4		ns
	th(S)	SYNC	hold time from CLKIN low	4		ns

²Value derived from characterization data and not tested.

NOTES: 3. Q = 1/4 tc(C)

4. CLKIN duty cycle [tr(CI) + tw(CIH)]/tc(CI) must be within 40-60%.

36	POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001

Image 36

Texas Instruments TMS320 specifications Fcrystal

Contents

TMS320 SECOND-GENERATION Digital Signal Processors Description Signals Definition PGA and PLCC/CER-QUAD PIN AssignmentsFunction PIN Introduction Key Features TMS32020 Bit-Reversed Indexed-Addressing Mode forMemory Space Wait States for Communication to Slower Off-Chip Architecture TMS320 Second-Generation Device OverviewPackage Type Functional block diagram TMS320C2x SECOND-GENERATION Devices Timer Scaling shifter16 ⋅ 16-bit parallel multiplier Memory control TMS320 SECOND-GENERATION Devices Memory Maps Interrupts and subroutines External interfaceMultiprocessing Repeat feature Instruction setAddressing modes Instruction Symbols Symbol DefinitionInstruction set summary TMS320C25 Instruction Set Summary SUBT² XORXORK² ZAC Apac LPH ²LTA LTP ² Data Memory Operations Mnemonic Description Words TMS320C25 Instruction Set Summary concluded TMS32020 TMS32020 Product Notification Development support TMS320 Second-Generation Software and Hardware Support Software Tools Part NumberHardware Tools Part Number Specification overview Documentation support Recommended operating conditions MIN NOM MAX UnitParameter Test Conditions MIN TYP§ MAX Unit Clock Characteristics and Timing Internal clock optionExternal clock option Test Load Circuit Memory and Peripheral Interface Timing Parameter MIN TYP MAX Unit RS, INT, BIO, and XF Timing Hold TimingHold Holda Serial Port Timing INT Clkin / Clkx / Clkr MP/MC IOHTMS320C25GBA Parameter Test Conditions MIN TYP MAX Unit External Clock Option Clkin VOH Min TdC1L-AL Low after CLKOUT1 low Serial Port Timing Eprom Programming See Notes 14VPP IPP1 INT0 INT2 VIH CLKIN, CLKX, ClkrMP/MC VIL Internal Clock Option External clock option CLKOUT1, CLKOUT2 Fcrystal TdC1-S From Clkout if Is present TsuIN Setup before CLKOUT1 high Contrast Summary of Electrical Specifications Clock characteristics and timingParameter MIN TYP MAX Memory and peripheral interface timing RS, INT, BIO, and XF timingHold timing Serial port timing Timing Diagrams Clock timing Memory read timing BR, PS, D SReady Memory write timing CLKOUT1 CLKOUT2 Strb One wait-state memory access timing MSC Reset timing Iack Interrupt timing TMS32020 Interrupt timing TMS320C25 Serial port receive timing Serial port transmit timing BIO timing External flag timing PC = N PC = N + Hold timing part a HoldHolda Execute Hold timing part B CLKOUT1 CLKOUT2Holda Fetch Fetch Execute Or is D15-D0 TdHH-AH Typical Supply Current Characteristics for TMS320C25 TMS320C25FNL Plcc reflow soldering precautions Mechanical Data Pin GB grid array ceramic package TMS32020, TMS320C25Parameter MAX Unit Advance Jedec NO. Outline Terminals MIN MAX Programming the TMS320E25 Eprom cell Fast programming and verification Pin Nomenclature TMS320E25 VCCEPT EPT VPP TMS320E25 Programming Mode Levels SignalProgram Read Output Name ² PIN Verify Inhibit Disable Erasure Fast Programming Flowchart Program verify Output disable ReadROM protection and verification TMS320E25 Protect and Verify Eprom Mode Levels Eprom protectVIH VIL PGM VPP VCC VSS Clkin EPT VPP Eprom Rbit VIH VIL VPP VCC VCC VIH VIL PGM VIH/VOH HI-Z VIL/VOL VPP EPT VSS TMS320 SECOND-GENERATION NIL Packaging Information Other Qualified Versions of TMS320C25 Important Notice