TMS320E25
ADVANCE INFORMATION
SPRS010B Ð MAY 1987 Ð REVISED NOVEMBER 1990
Table 5 shows the programming levels required for programming, verifying and reading the EPROM cell. The paragraphs following the table describe the function of each programming level.
Table 5. TMS320E25 Programming Mode Levels
SIGNAL | TMS320E25 | TMS27C64 | PROGRAM | PROGRAM | PROGRAM |
| READ | OUTPUT | ||||||||||||
NAME ² | PIN | PIN | VERIFY | INHIBIT |
| DISABLE | ||||||||||||||
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| 22 | 20 |
| VIL |
| VIL | VIH |
| VIL | VIL | |||
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| E |
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| 42 | 22 |
| VIH |
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| X |
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| VIH | |
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| G |
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| PULSE |
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| PULSE |
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| 41 | 27 |
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| VIH | X |
| VIH | VIH | ||
| PGM |
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| PULSE |
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| VPP | 25 | 1 |
| VPP |
| VPP | VPP |
| VCC | VCC | |||||||||
| VCC | 61,35 | 28 | VCC + 1 | VCC + 1 | VCC + 1 |
| VCC | VCC | |||||||||||
| VSS | 27,44,10 | 14 |
| VSS |
| VSS | VSS |
| VSS | VSS | |||||||||
CLKIN | 52 | 14 |
| VSS |
| VSS | VSS |
| VSS | VSS | ||||||||||
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| 65 | 14 |
| VSS |
| VSS | VSS |
| VSS | VSS | |||
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| RS |
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| EPT | 24 | 26 |
| VSS |
| VSS | VSS |
| VSS | VSS | |||||||||
| DIN |
| QOUT |
| QOUT | |||||||||||||||
2,23,21, |
| ADDR |
| ADDR | X |
| ADDR | X | ||||||||||||
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37,36,34 | 24,25,3 |
| ADDR |
| ADDR | X |
| ADDR | X | |||||||||||
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| A6 | 33 | 4 |
| ADDR |
| ADDR | X |
| ADDR | X | ||||||||
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| A5 | 32 | 5 |
| ADDR |
| ADDR | X |
| ADDR | X | ||||||||
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| A4 | 31 | 3 |
| ADDR |
| ADDR | X |
| ADDR | X | ||||||||
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| ADDR |
| ADDR | X |
| ADDR | X | |||||||||||||
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²In accordance with TMS27C64.
LEGEND;
VIH = TTL high level; VIL = TTL low level; ADDR = byte address bit
±0.5 V; VCC = 5 ± 0.25 V; X = don't careVPP = 12.5 V
PULSE =
QOUT = byte stored at ADDR; RBIT = ROM protect bit.
erasure
Before programming, the device is erased by exposing the chip through the transparent lid to
fast programming
After erasure (all memory bits in the cell are logic one), logic zeroes are programmed into the desired locations. The fast programming algorithm, shown in Figure 10, is normally used to program the entire EPROM contents, although individual locations may be programmed separately. A programmed logic zero can be erased only by ultraviolet light. Data is presented in parallel (eight bits) on pins
Programming uses two types of programming pulses: prime and final. The length of the prime pulse is 1 ms. After each prime pulse, the byte being programmed is verified. If correct data is read, the final programming pulse is applied; if correct data is not read, an additional
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