Texas Instruments 28xxx, TMS320x28xx manual ∙ EPWMxSYNCI Synchronization Input Pulse

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Time-Base (TB) Submodule

Figure 2-6. Time-Base Counter Synchronization Scheme 3

SYNCI

eCAP1

	EPWM1SYNCI
	ePWM1
	EPWM1SYNCO
EPWM2SYNCI	EPWM2SYNCI
ePWM4	ePWM2
EPWM2SYNCO	EPWM2SYNCO
EPWM3SYNCI	EPWM3SYNCI
ePWM5	ePWM3
EPWM3SYNCO	EPWM3SYNCO
EPWMxSYNCI
ePWM6
EPWMxSYNCO

GPIO MUX

Each ePWM module can be configured to use or ignore the synchronization input. If the TBCTL[PHSEN] bit is set, then the time-base counter (TBCTR) of the ePWM module will be automatically loaded with the phase register (TBPHS) contents when one of the following conditions occur:

∙EPWMxSYNCI: Synchronization Input Pulse:

The value of the phase register is loaded into the counter register when an input synchronization pulse is detected (TBPHS → TBCNT). This operation occurs on the next valid time-base clock (TBCLK) edge.

∙Software Forced Synchronization Pulse:

Writing a 1 to the TBCTL[SWFSYNC] control bit invokes a software forced synchronization. This pulse is ORed with the synchronization input signal, and therefore has the same effect as a pulse on EPWMxSYNCI.

This feature enables the ePWM module to be automatically synchronized to the time base of another ePWM module. Lead or lag phase control can be added to the waveforms generated by different ePWM modules to synchronize them. In up-down-count mode, the TBCTL[PSHDIR] bit configures the direction of the time-base counter immediately after a synchronization event. The new direction is independent of the direction prior to the synchronization event. The TBPHS bit is ignored in count-up or count-down modes. See Figure 2-7through Figure 2-10for examples.

Clearing the TBCTL[PHSEN] bit configures the ePWM to ignore the synchronization input pulse. The synchronization pulse can still be allowed to flow-through to the EPWMxSYNCO and be used to synchronize other ePWM modules. In this way, you can set up a master time-base (for example, ePWM1) and downstream modules (ePWM2 - ePWMx) may elect to run in synchronization with the master. See the Application to Power Topologies Chapter 3 for more details on synchronization strategies.

SPRU791D–November 2004–Revised October 2007 ePWM Submodules 29

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