Texas Instruments 28xxx, TMS320x28xx manual List of Tables

List of Tables

1-1	ePWM Module Control and Status Register Set Grouped by Submodule		18
2-1	Submodule Configuration Parameters		20
2-2	Time-Base Submodule Registers		24
2-3	Key Time-Base Signals		25
2-4	Counter-Compare Submodule Registers		33
2-5	Counter-Compare Submodule Key Signals		34
2-6	Action-Qualifier Submodule Registers		37
2-7	Action-Qualifier Submodule Possible Input Events		38
2-8	Action-Qualifier Event Priority for Up-Down-Count Mode		40
2-9	Action-Qualifier Event Priority for Up-Count Mode		40
2-10	Action-Qualifier Event Priority for Down-Count Mode		40
2-11	Behavior if CMPA/CMPB is Greater than the Period		41
2-12	Dead-Band Generator Submodule Registers		50
2-13	Classical Dead-Band Operating Modes		52
2-14	Dead-Band Delay Values in μS as a Function of DBFED and DBRED		54
2-15	PWM-Chopper Submodule Registers		55
2-16	Possible Pulse Width Values for SYSCLKOUT = 100 MHz		57
2-17	Trip-Zone Submodule Registers		60
2-18	Possible Actions On a Trip Event		61
2-19	Event-Trigger Submodule Registers		65
4-1	Time-Base Period Register (TBPRD) Field Descriptions		94
4-2	Time-Base Phase Register (TBPHS) Field Descriptions		94
4-3	Time-Base Counter Register (TBCTR) Field Descriptions		94
4-4	Time-Base Control Register (TBCTL) Field Descriptions		95
4-5	Time-Base Status Register (TBSTS) Field Descriptions		97
4-6	Counter-Compare A Register (CMPA) Field Descriptions		98
4-7	Counter-Compare B Register (CMPB) Field Descriptions		98
4-8	Counter-Compare Control Register (CMPCTL) Field Descriptions		99
4-9	Action-Qualifier Output A Control Register (AQCTLA) Field Descriptions		100
4-10	Action-Qualifier Output B Control Register (AQCTLB) Field Descriptions		101
4-11	Action-Qualifier Software Force Register (AQSFRC) Field Descriptions		102
4-12	Action-qualifier Continuous Software Force Register (AQCSFRC) Field Descriptions		103
4-13	Dead-Band Generator Control Register (DBCTL) Field Descriptions		104
4-14	Dead-Band Generator Rising Edge Delay Register (DBRED) Field Descriptions		105
4-15	Dead-Band Generator Falling Edge Delay Register (DBFED) Field Descriptions		105
4-16	PWM-Chopper Control Register (PCCTL) Bit Descriptions		105
4-17	Trip-Zone Submodule Select Register (TZSEL) Field Descriptions		107
4-18	Trip-Zone Control Register (TZCTL) Field Descriptions		108
4-19	Trip-Zone Enable Interrupt Register (TZEINT) Field Descriptions		108
4-20	Trip-Zone Flag Register (TZFLG) Field Descriptions		109
4-21	Trip-Zone Clear Register (TZCLR) Field Descriptions		110
4-22	Trip-Zone Force Register (TZFRC) Field Descriptions		110
4-23	Event-Trigger Selection Register (ETSEL) Field Descriptions		111
4-24	Event-Trigger Prescale Register (ETPS) Field Descriptions		112
4-25	Event-Trigger Flag Register (ETFLG) Field Descriptions		114
4-26	Event-Trigger Clear Register (ETCLR) Field Descriptions		114
4-27	Event-Trigger Force Register (ETFRC) Field Descriptions		115
A-1	Changes for Revision D		117
SPRU791D–November 2004–Revised October 2007		List of Tables	7

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