Toshiba A3X manual Chgfirma.Exe

2.4 System Board Troubleshooting			2 Troubleshooting Procedures
		Table 2-3 D port status (3/9)
	D port	Inspection items	Details
	status
			Searching entry of
			“CHGBIOSA.EXE/CHGFIRMA.EXE” from the
			loaded sector
			Loading EXE header of “CHGBIOSA.EXE
			/CHGFIRMA.EXE”,
			Key input when an error occurred
			Executing “CHGBIOSA.EXE”/”CHGFIRMA.EXE”
	IRT
	F100H	IRT_START
		Cache controll for HyperThreading
		Disabling cache
		Initializing H/W	Initializing MCHM
		(before recognizing DRAM)
			Initializing ICH4M.D31.Func0
			Initializing ICH4M.D31.Func1
			Initializing USB.Func0,1,2,7
			Initializing ICH4M.D31.Func3
			Initializing ICH4M.D31.Func5
			Initializing FLUTE
		Initializing the channel 1 of a PIT	(set 30 µs for refresh interval)
	F101H	IRT_INI_SPREG_END
		Checking type and size of DRAM (at	When no suport memory is connected, HLT after
		Cold boot only)	beep
		HLT when DRAM size is 0
		Testing stack area of SM-RAM	HLT when impossible to use as stack
	F102H	IRT_STACK_TEST_END
		Cache Configuration
		Enabling L1 and L2 cache
		Access test of CMOS	(at Cold boot only)
			(HLT when an error occurred)
		Checking battery level of CMOS
		CheckSum check of CMOS
		Initializing CMOS data (1)
		Setting up IRT status	(Setting of Boot status and IRT Busy Flag, The
			bit left is 0)
		Storing DRAM size

Satellite A50S/TECRA A3X Maintenance Manual (960-534) [CONFIDENTIAL] 2-21