Xilinx ML310 manual Online Document, Handbook

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Convention

Meaning or Use

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Vertical ellipsis

 

IOB #1: Name = QOUT’

 

IOB #2: Name = CLKIN’

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Repetitive material that has

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been omitted

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Horizontal ellipsis . . .

Repetitive material that has

allow block block_name

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loc1 loc2 ... locn;

 

 

 

 

Online Document

The following conventions are used in this document:

Convention

Meaning or Use

Example

 

 

 

 

Cross-reference link to a

See the section “Additional

Blue text

location in the current file or

Resources” for details.

in another file in the current

Refer to “Title Formats” in

 

 

document

Chapter 1 for details.

 

 

 

Red text

Cross-reference link to a

See Figure 2-5in the Virtex-II

location in another document

Handbook.

 

 

 

 

Blue, underlined text

Hyperlink to a website (URL)

Go to http://www.xilinx.com

for the latest speed files.

 

 

 

 

 

ML310 User Guide

www.xilinx.com

9

UG068 (v1.01) August 25, 2004

1-800-255-7778

 

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Contents UG068 v1.01 August 25 ML310 User GuideML310 User Guide Version Revision ML310 User Guide UG068 v1.01 August 25UG068 v1.01 August 25 Table of Contents UG068 v1.01 August 25 Additional Resources Manual ContentsTypographical ConventionsHandbook Online DocumentChapter Virtex-II Pro Summary of Virtex-II Pro FeaturesRocketIO 3.125 Gb/s Transceivers PowerPC 405 CoreVirtex-II Pro Virtex-II Fpga FabricFoundation ISE Foundation FeaturesDesign Entry Introduction to Virtex-II Pro, ISE, and EDKImplementation and Configuration SynthesisFoundation ISE Board Level Integration Embedded Development KitOverview ML310 Embedded Development PlatformML310 Board ML310 Embedded Development PlatformOverview FeaturesClock Generation Board HardwareBoard Hardware DDR MemoryDDR Signaling DDR Memory ExpansionU37 DDRA2 DDRDQS02 DDRDQ31 Serial Port Fpga Uart Signaling Standards of RS-232Introduction to Serial Ports RS-232 on the ML310Board Bring-Up System ACE CF ControllerXC2VP30 Connectivity Non-Volatile Storage6JTAG Connections to the XC2VP30 and System ACE Jtag Connection to XC2VP30System ACE Jtag Configuration Interface Gpio LEDs and LCDParallel Cable IV Interface 8LEDs and LCD Connectivity Gpio LED Interface UCF Signal Name Translator U37 J13 U35Gpio LCD Interface U37 Name U36CPU Debug and CPU Trace CPU Debug DescriptionBuffer U33 J13 9Combined Trace/Debug Connector Pinout CPU Debug Connector Pinout PCI BusCPU Debug Connection to XC2VP30 ML310 Embedded Development Platform 11 PCI Bus and Device Connectivity Pciinta Pciintb Pciintc Pcipar Pcippar Pcirstn Pciprstn 113.3V Primary PCI Bus Information Device Vendor ALi South Bridge Interface, M1535D+, U15Device Name Bus 125.0V Secondary PCI Bus Information Device Name Vendor12ALi South Bridge Interface, M1535D+, U15 Parallel Port Interface, connector assembly P1Serial Port Interface, connector assembly P1 USB, connector assembly J3 IDE, connectors J15 and J16 GPIO, connector J5 System Management Bus SMBus17Type of Gpio Available on Header J5 ALi Gpio Types Number AC97 Audio 19Audio Jacks, J1 and J2 Signal name DescriptionFlash ROM, U4 PS/2 Keyboard/Mouse Interface, connector P2Intel GD82559 Ethernet Controller Intel GD82559, U11, 10/100 Ethernet ControllerIIC/SMBus Interface IIC/SMBus SignalingIntroduction to IIC/SMBus IIC/SMBus on ML310 Board22shows the Fpga connections to all SMBus and IIC devices 14SMBus and IIC Block Diagram Serial Peripheral Interface SPI SPI SignalingPush Buttons, Switches, Front Panel Interface and Jumpers SPI AddressingPush Buttons CPU Reset, SW2 System ACE Configuration Dipswitch, SW316SW3 SysACE CFG Switch Detail Front Panel Interface Connector, J23SYACECFGA0 Jumpers Voltage JumperJ10 J11 Coupling MGT Bref Clock Selection Jumpers, J20 and J21 ATX Power Distribution and Voltage Regulation17ATX Power Distribution and Voltage Regulation 18Voltage Monitor High-Speed I/O High-Speed I/O19Personality Module Connected to ML310 Board ML310 PM ConnectorsPM2 Connector PM1 ConnectorML310 PM Utility Pins Adapter Board PM ConnectorsContact Order PM1 Power and Ground ML310 PM User I/O PinsPM2 Power and Ground PM1 User I/ORXPPAD4 RXPPAD4A25 31 PM1 Pinout RXPPAD21 RXPPAD21AK25 ML310 PM2 User I/O32 PM2 Pinout AA5