Xilinx ML310 manual PS/2 Keyboard/Mouse Interface, connector P2, Flash ROM, U4

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Board Hardware

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PS/2 Keyboard/Mouse Interface, connector P2

The ALi M1535D+ has a built-in PS2/AT Keyboard and PS/2 Mouse controller. The PS/2 Keyboard and Mouse ports are connected to the ALi M1535D+ via standard DIN connectors contained in the P2 connector assembly. In the event of a short circuit by the keyboard or mouse device, the 5V power provided to these devices is fuse protected by a resettable fuse, F1. Please review the ALi M1535D+ Data sheets for more detailed information.

Table 2-20shows the PS/2 keyboard and mouse connections to the P2 connector assembly.

Table 2-20:PS/2 Keyboard and Mouse

Signal Name	Connector (P2)	Description

KDAT	1	Keyboard Data

KCLK	5	Keyboard Clock

MDAT	7	Mouse Data

MCLK	11	Mouse Clock

KVCC, MVCC	4, 10	Fuse protected power to Keyboard and Mouse

Flash ROM, U4

The ALi South Bridge supports 4 Mbit Flash memory interface. The ML310 provides connectivity to an AM29F040B 4-Megabit (512 K x 8-Bit) Flash (U4) via the ALi M1535D+ ROM interface. Please review the ALi M1535D+ Data sheets for more detailed information.

Table 2-21shows the connections between the ALi M1535D+ (U15) ROM signals to the AM29F040B (U4) Flash Memory device. Please review the ALi M1535D+ and AM29F040B Data sheets, located on the ML310 CDROM, for more detailed information.

Table 2-21:ALi M1535 Flash Memory Interface

	Schem Net Name	M1535D+	AM29F040B	Description
	Schem Net Name	(U15)	(U4)	Description
		(U15)	(U4)

	ROM_WE_N	U14	7	Active Low Write Enable

	ROM_OE_N	T14	32	Active Low Output Enable

	ROM_D7	W19	29

	ROM_D6	Y19	28

	ROM_D5	V20	27

	ROM_D4	W20	26	Flash Data

	ROM_D3	Y20	25
	ROM_D3	Y20	25

	ROM_D2	U18	23

	ROM_D1	U19	22

	ROM_D0	U20	21

ML310 User Guide	www.xilinx.com	47
UG068 (v1.01) August 25, 2004	1-800-255-7778

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Contents UG068 v1.01 August 25 ML310 User GuideML310 User Guide Version Revision ML310 User Guide UG068 v1.01 August 25UG068 v1.01 August 25 Table of Contents UG068 v1.01 August 25 Additional Resources Manual ContentsTypographical ConventionsHandbook Online DocumentChapter Virtex-II Pro Summary of Virtex-II Pro FeaturesRocketIO 3.125 Gb/s Transceivers PowerPC 405 CoreVirtex-II Pro Virtex-II Fpga FabricIntroduction to Virtex-II Pro, ISE, and EDK Foundation FeaturesFoundation ISE Design EntryFoundation ISE Implementation and ConfigurationSynthesis Board Level Integration Embedded Development KitOverview ML310 Embedded Development PlatformML310 Board ML310 Embedded Development PlatformOverview FeaturesClock Generation Board HardwareBoard Hardware DDR MemoryU37 DDR SignalingDDR Memory Expansion DDRA2 DDRDQS02 DDRDQ31 RS-232 on the ML310 Signaling Standards of RS-232Serial Port Fpga Uart Introduction to Serial PortsBoard Bring-Up System ACE CF ControllerXC2VP30 Connectivity Non-Volatile Storage6JTAG Connections to the XC2VP30 and System ACE Jtag Connection to XC2VP30Parallel Cable IV Interface System ACE Jtag Configuration InterfaceGpio LEDs and LCD 8LEDs and LCD Connectivity U37 Name U36 UCF Signal Name Translator U37 J13 U35Gpio LED Interface Gpio LCD InterfaceBuffer U33 J13 CPU Debug and CPU TraceCPU Debug Description 9Combined Trace/Debug Connector Pinout CPU Debug Connection to XC2VP30 CPU Debug Connector PinoutPCI Bus ML310 Embedded Development Platform 11 PCI Bus and Device Connectivity Pciinta Pciintb Pciintc Pcipar Pcippar Pcirstn Pciprstn 125.0V Secondary PCI Bus Information Device Name Vendor ALi South Bridge Interface, M1535D+, U15113.3V Primary PCI Bus Information Device Vendor Device Name Bus12ALi South Bridge Interface, M1535D+, U15 Parallel Port Interface, connector assembly P1Serial Port Interface, connector assembly P1 USB, connector assembly J3 IDE, connectors J15 and J16 17Type of Gpio Available on Header J5 ALi Gpio Types Number GPIO, connector J5System Management Bus SMBus AC97 Audio 19Audio Jacks, J1 and J2 Signal name DescriptionFlash ROM, U4 PS/2 Keyboard/Mouse Interface, connector P2Intel GD82559 Ethernet Controller Intel GD82559, U11, 10/100 Ethernet ControllerIIC/SMBus on ML310 Board IIC/SMBus SignalingIIC/SMBus Interface Introduction to IIC/SMBus22shows the Fpga connections to all SMBus and IIC devices 14SMBus and IIC Block Diagram Serial Peripheral Interface SPI SPI SignalingPush Buttons Push Buttons, Switches, Front Panel Interface and JumpersSPI Addressing CPU Reset, SW2 System ACE Configuration Dipswitch, SW316SW3 SysACE CFG Switch Detail Front Panel Interface Connector, J23SYACECFGA0 J10 J11 Coupling JumpersVoltage Jumper MGT Bref Clock Selection Jumpers, J20 and J21 ATX Power Distribution and Voltage Regulation17ATX Power Distribution and Voltage Regulation 18Voltage Monitor High-Speed I/O High-Speed I/O19Personality Module Connected to ML310 Board ML310 PM ConnectorsPM2 Connector PM1 ConnectorContact Order ML310 PM Utility PinsAdapter Board PM Connectors PM1 User I/O ML310 PM User I/O PinsPM1 Power and Ground PM2 Power and GroundRXPPAD4 RXPPAD4A25 31 PM1 Pinout RXPPAD21 RXPPAD21AK25 ML310 PM2 User I/O32 PM2 Pinout AA5