Xilinx ML310 manual High-Speed I/O

Page 61

High-Speed I/O

Table 2-28Shows the various Voltage monitor information.

R

Table 2-28:Voltage Monitor Information

Schem Name

Voltage

Testpoint

*Indicator

Notes

LED

 

 

 

 

 

 

 

 

 

VCC1V5

1.5V

TP17

DS8

Regulated FPGA Core voltage

 

 

 

 

 

VCC2V5

2.5V

TP14

DS6

Regulated FPGA / Board Logic

 

 

 

 

 

VCC3_PCI

3.0V

TP10

DS4

Regulated FPGA PCI Bank 1-2 Voltage

 

 

 

 

 

VCC3V3

3.3V

TP8

DS2

Regulated PCI/Misc Logic

 

 

 

 

 

VCC5V

5.0V

TP16

DS7

From ATX Supply, All Regulators Derive Power

 

 

 

 

 

VTT_DDR

1.25V

TP13

DS5

Regulated DDR Termination (SSTL2)

 

 

 

 

 

MGT_AVCC

2.5V

N/A

DS3

Regulated MGT Power

 

 

 

 

 

MGT_VTT

1.8V

N/A

DS1

Regulated MGT Power

 

 

 

 

 

VCC3V3_ATX

3.3V

TP20

N/A

Not used

 

 

 

 

 

VCC12V_P

+12V

TP18

N/A

Direct from ATX Supply

 

 

 

 

 

VCC12V_N

-12V

TP19

N/A

Direct from ATX Supply

 

 

 

 

 

*Green = Voltage Nominal

*Red = Voltage Fault

High-Speed I/O

Xilinx Virtex-II Pro FPGAs offer a variety of high-speed I/O solutions. The ML310 Embedded Development Platform’s high-speed I/O is based on the XC2VP30-FF896 FPGA’s RocketIO multi-gigabit transceivers (MGTs) and LVDS capability. The high-speed I/O signals on the FPGA are accessible through two personality module (PM) connectors, PM1 and PM2, on the ML310 board. The ML310 is the host board, functioning as the development platform for Virtex-II Pro FPGA. The PM connectors on the ML310 board provide a means for extending the functionality of the board through high-speed I/O pins. Personality modules connect to the ML310 board using Tyco Z-Dok+ docking connectors, PM1 and PM2. In addition to having differential pairs and shielding ground connections, Z-Dok+ connectors include utility connections for power, ground, and sensing. Tyco Z- Dok+ high-speed connectors are rated to 6.25 Gb/s.

Figure 2-19shows a personality module connected to the ML310 board through the PM1 and PM2 connectors. The plug, located on the ML310 board, is referred to as the host board connector; the receptacle, located on the personality module, is referred to as the adapter board connector.

ML310 User Guide

www.xilinx.com

61

UG068 (v1.01) August 25, 2004

1-800-255-7778

 

Image 61
Contents UG068 v1.01 August 25 ML310 User GuideML310 User Guide Version Revision ML310 User Guide UG068 v1.01 August 25UG068 v1.01 August 25 Table of Contents UG068 v1.01 August 25 Additional Resources Manual ContentsTypographical ConventionsHandbook Online DocumentChapter Virtex-II Pro Summary of Virtex-II Pro FeaturesRocketIO 3.125 Gb/s Transceivers PowerPC 405 CoreVirtex-II Pro Virtex-II Fpga FabricFoundation ISE Foundation FeaturesDesign Entry Introduction to Virtex-II Pro, ISE, and EDKSynthesis Implementation and ConfigurationFoundation ISE Board Level Integration Embedded Development KitOverview ML310 Embedded Development PlatformML310 Board ML310 Embedded Development PlatformOverview FeaturesClock Generation Board HardwareBoard Hardware DDR MemoryDDR Memory Expansion DDR SignalingU37 DDRA2 DDRDQS02 DDRDQ31 Serial Port Fpga Uart Signaling Standards of RS-232Introduction to Serial Ports RS-232 on the ML310Board Bring-Up System ACE CF ControllerXC2VP30 Connectivity Non-Volatile Storage6JTAG Connections to the XC2VP30 and System ACE Jtag Connection to XC2VP30Gpio LEDs and LCD System ACE Jtag Configuration InterfaceParallel Cable IV Interface 8LEDs and LCD Connectivity Gpio LED Interface UCF Signal Name Translator U37 J13 U35Gpio LCD Interface U37 Name U36CPU Debug Description CPU Debug and CPU TraceBuffer U33 J13 9Combined Trace/Debug Connector Pinout PCI Bus CPU Debug Connector PinoutCPU Debug Connection to XC2VP30 ML310 Embedded Development Platform 11 PCI Bus and Device Connectivity Pciinta Pciintb Pciintc Pcipar Pcippar Pcirstn Pciprstn 113.3V Primary PCI Bus Information Device Vendor ALi South Bridge Interface, M1535D+, U15Device Name Bus 125.0V Secondary PCI Bus Information Device Name Vendor12ALi South Bridge Interface, M1535D+, U15 Parallel Port Interface, connector assembly P1Serial Port Interface, connector assembly P1 USB, connector assembly J3 IDE, connectors J15 and J16 System Management Bus SMBus GPIO, connector J517Type of Gpio Available on Header J5 ALi Gpio Types Number AC97 Audio 19Audio Jacks, J1 and J2 Signal name DescriptionFlash ROM, U4 PS/2 Keyboard/Mouse Interface, connector P2Intel GD82559 Ethernet Controller Intel GD82559, U11, 10/100 Ethernet ControllerIIC/SMBus Interface IIC/SMBus SignalingIntroduction to IIC/SMBus IIC/SMBus on ML310 Board22shows the Fpga connections to all SMBus and IIC devices 14SMBus and IIC Block Diagram Serial Peripheral Interface SPI SPI SignalingSPI Addressing Push Buttons, Switches, Front Panel Interface and JumpersPush Buttons CPU Reset, SW2 System ACE Configuration Dipswitch, SW316SW3 SysACE CFG Switch Detail Front Panel Interface Connector, J23SYACECFGA0 Voltage Jumper JumpersJ10 J11 Coupling MGT Bref Clock Selection Jumpers, J20 and J21 ATX Power Distribution and Voltage Regulation17ATX Power Distribution and Voltage Regulation 18Voltage Monitor High-Speed I/O High-Speed I/O19Personality Module Connected to ML310 Board ML310 PM ConnectorsPM2 Connector PM1 ConnectorAdapter Board PM Connectors ML310 PM Utility PinsContact Order PM1 Power and Ground ML310 PM User I/O PinsPM2 Power and Ground PM1 User I/ORXPPAD4 RXPPAD4A25 31 PM1 Pinout RXPPAD21 RXPPAD21AK25 ML310 PM2 User I/O32 PM2 Pinout AA5