13-20 User Guide for the Avaya P580 and P882 Multiservice Switches, v6.1
Chapter 13
the CPU for processing and forwarding. Once the CPU has
determined the destination, it updates the L3 forwarding cache on
the F-chips with the L3FE. Once updated, the F-chip can forward
future packets via Fast Path.
■SA: Source IP Address.
■Slow Path: When an ingress F-chip does not recognize a packet
compared to its cache of known Flows, the packet is forwarded to
the CPU to determine proper destination and ACL Rule assignment.
Techniques You can us e several techniq ues to opt imize the switch pe rformance when an
access list is enabled. The techniques are related and must be considered
together.
■Recognizing Performance Issues
■Evaluating System Performance
■Enabling Routing at the Module
■Designing Safe, Efficient ACLs
■Identifying the Ports
■Configuring Hash Mode
■Using Protocol or Port IDs in Access Rules
■Managing F-chip Memory
Recognizing Performance Issues
When the ACL is the root of a performance problem, it shows as the Slow
Path becoming overused. The Slow Path is not designed to handle
significant traffic levels since the single CPU also handles all other
management functions. There are several ways to determine if the CPU is
overloaded:
■Continuous PING to the supervisor: timeouts or inconsistent timing
of echo responses.
■Slow Scrolling LED Marquee: This is good visual sign that t he CPU
is busy.
■Slow Management response: If Avaya Multiservice Network
Manager (MSNM), Avaya Policy Manager (APM), HPOV, or a
MIB browser get slow updates, this can signify a busy CPU or
saturated network.
■Slow network response: This can be measured in a variety of ways.