TTCAN | User’s Manual | Revision 1.6 |
manual_about.fm
set to not valid any time, even when their requested transmission is still pending. The old data will be discarded when a message is updated before its pending transmission has started.
Depending on the configuration of the Message Object, the transmission of a message may be requested autonomously by the reception of a remote frame with a matching identifier.
2.3.3 Disabled Automatic Retransmission
According to the CAN Specification (see ISO11898, 6.3.3 Recovery Management), the TTCAN provides means for automatic retransmission of frames that have lost arbitration or that have been disturbed by errors during transmission. The frame transmission service will not be confirmed to the user before the transmission is successfully completed. By default, this means for automatic retransmission is enabled. It can be disabled to enable the TTCAN to work within a Time Triggered CAN (TTCAN, see
The Disabled Automatic Retransmission mode is enabled by programming bit DAR in the CAN Control Register to one. In this operation mode the programmer has to consider the different behaviour of bits TxRqst and NewDat in the Control Registers of the Message Buffers:
•When a transmission starts bit TxRqst of the respective Message Buffer is reset, while bit NewDat remains set.
•When the transmission completed successfully bit NewDat is reset.
When a transmission failed (lost arbitration or error) bit NewDat remains set. To restart the transmission the CPU has to set TxRqst back to one.
Note : It is not necessary to set DAR if the TTCAN is in time triggered operating mode.
2.3.4 Test Mode
The Test Mode is entered by setting bit Test in the CAN Control Register to one. In Test Mode the bits Tx1, Tx0, LBack, Silent, NoRAM, and WdOff in the Test Register are writable. Bit Rx monitors the state of pin CAN_RX and therefore is only readable. All Test Register functions are disabled when bit Test is reset to zero.
Loop Back Mode, No Message RAM Mode, and CAN_TX Control Mode are hardware test modes, not to be used by application programs.
Silent Mode and the Watchdog Disable Mode are software test modes.
2.3.4.1 Test Register (addresses 0x0B & 0x0A)
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
StW | EvT | res | res | res | res | res | res | Rx | Tx1 | Tx0 | LBack | Silent | NoRAM | res | WdOff |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
r | r | r | r | r | r | r | r | r | rw | rw | rw | rw | rw | r | rw |
StW Monitors the actual value of the STOP_WATCH_TRIGGER pin
EvT Monitors the actual value of the EVENT_TRIGGER pin
Rx Monitors the actual value of the CAN_RX pin one The CAN bus is recessive (CAN_RX = ‘1’). zero The CAN bus is dominant (CAN_RX = ‘0’).
00Reset value, CAN_TX is controlled by the CAN_Core.
01Sample Point can be monitored at CAN_TX pin.
10CAN_TX pin drives a dominant (‘0’) value.
11CAN_TX pin drives a recessive (‘1’) value.
BOSCH | - 11/77 - | 11.11.02 |
