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Troubleshooting
Table A-1 POST code checkpoints (continued)
| Checkpoint | Description | Solution |
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| 3B | Test for total memory installed in the | 1. | Restart the |
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| system. Also, Check for the Delete or | 2. | Replace the |
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| ESC key to limit memory test. Display |
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| total memory in the system. |
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| 3C | Initialize Mid POST chipset registers. |
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| 40 | Detect different devices (such as parallel |
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| ports, serial ports, and coprocessor in |
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| CPU) successfully installed in the system |
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| and update the BDA, EBDA, and so on. |
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| 50 | Program the memory hole or any kind |
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| of implementation that needs an |
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| adjustment in system RAM size if |
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| needed. |
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| 52 | Update CMOS RAM memory size from |
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| the memory found in memory test. |
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| Allocate memory for the extended BIOS |
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| data area from base memory. |
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| 60 | Initialize NumLock status and program |
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| the keyboard typematic rate. |
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| 75 | Initialize |
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| detection. |
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| 78 | Initialize IPL devices controlled by BIOS |
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| and optional ROMs. |
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| 7A | Initialize remaining optional ROMs. | 1. | Restart the |
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| 2. | Upgrade the BIOS and restart the |
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| 3. | Replace the |
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| 7C | Generate and write contents of ESCD in | 1. | Restart the |
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| NVRam. | 2. | Check whether the BIOS write |
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| protection is enabled. If it is |
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| enabled, disable it and restart the |
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| 3. | Replace the |
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| 84 | Record errors encountered during POST. | 1. | Restart the |
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| 2. | Replace the |
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114 |
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