Fluke 8842a instruction manual Timing/Data Control, Precision DAC

Theory of Operation 5

A/D CONVERTER

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Figure 5-10. First Remainder-Store Period

This five-interval process thus generates five nibbles which are processed by the In- Guard μC to produce one A/D sample. After the fifth nibble is generated, U101 interrupts the In-Guard μC over line INT. The In-Guard μC then pulls line CS7 low five times, causing U101 to send the μC the five (six-bit) nibbles one-at-a-time over lines AD0- AD5. The In-Guard μC then weights each nibble 1/16 of the value of the previous number and calculates the input voltage.

The hardware for the A/D Converter has four major sections: Timing/Data Control, Precision DAC, A/D Amplifier, and bootstrap supplies.

5-21. Timing/Data Control

The Timing/Data Control circuit (the digital portion of U101) times and controls the A/D Converter by manipulating the switches in the A/D Amplifier and the bit-switches in the Precision DAC. An A/D conversion cycle is triggered by the falling edge of line TR from the In-Guard μC. Once triggered, the A/D Converter (under control by U101) generates the five 6-bit nibbles without further interaction with the In-Guard μC.

The Timing/Data Control circuit also provides a watch-dog timer (line RES not) which resets the In-Guard μC in case normal program execution is interrupted. If the timer senses inactivity on line CS7 for longer than 1.5 seconds, it resets the In-Guard μC by pulling RES not low.

The Timing/Data Control circuit is supplied with a fixed-rate 8 MHz clock and provides a 1 MHz output clock for the Keyboard/Display Interface (U212). In addition, four output lines (PC, HD1 not) TR1, and TR2) provide control signals for the Track/Hold circuit.

5-22. Precision DAC

The Precision Digital-to-Analog Converter (DAC) is composed of DAC Amplifier U102B and a binary ladder network, which consists of resistors in Z101 and digitally controlled analog bit-switches contained in U101.

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