
LED information
POST progress codes and definitionsThe following table shows the current boot progress codes and associated messages, sent to the POST progress LEDs:
Progress Code | Definition |
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|
Host Processor |
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|
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0×10 | |
| Processor) |
|
|
0×11 | Host processor cache initialization (including AP) |
|
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0×12 | Starting Application processor initialization |
|
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0×13 | SMM initialization |
|
|
Chipset |
|
|
|
0×21 | Initializing a chipset component |
|
|
Memory |
|
|
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0×22 | Reading configuration data from memory (SPD on DIMM) |
|
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0×23 | Detecting presence of memory |
|
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0×24 | Programming timing parameters in the memory controller |
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0×25 | Configuring memory parameters in the memory controller |
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0×26 | Optimizing memory controller settings |
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0×27 | Initializing memory, such as ECC init |
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|
0×28 | Testing memory |
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|
PCI Bus |
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|
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0×50 | Enumerating PCI busses |
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0×51 | Allocating resources to PCI busses |
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0×52 | |
|
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Reserved for PCI bus | |
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USB |
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|
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0×58 | Resetting USB bus |
|
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0×59 | Reserved for USB devices |
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|
ATA/ATAPI/SATA |
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|
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0×5A | Resetting PATA/SATA bus and all devices |
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