HP KAYAK XU800 manual HSa EC6 a, Following table shows the available P64H features

7 a• J½p

PCI 64-bit Hub

The following table shows the available P64H features.

Otp		Otpt
• PCI Interface:	•	Scalability / Flexibility:
❒ Both 64-bit and 32-bit 33 MHz or 66 MHz devices.		❒ Provides arbitration support for all PCI devices.
❒ Provides Synchronous operation to the P64H using		❒ Supports 2 x 66 MHz PCI slots.
1:1(66 MHz) or 2:1 (33 MHz) hub interface/PCI bus gearing		❒ Processes dual address cycle (DAC) for upstream access
ratio.		>4 GB.
❒ Allows input/output operations to occur with processor		❒ Handles 3.3 V operation with 5.0 V tolerant on all input pins.
transactions to isolate traffic.
❒ Parity and System Error (PERR# / PERR#).	•	Upstream Hub Link 16 Interface:
❒ Allows peer-to-peer communication within a single PCI bus
		❒ Connects to the MCH via a 16-bit hub interface.
segment.
		❒ Provides 64-bit and 32-bit addressing.
❒ Provides PCI transaction forwarding for all I/O and memory
		❒ Utilizes 66 MHz base clock.
(Type 1-to-Type 1, Type 1-to-Type 0, Type 1 to a special
		❒ Utilizes 133 MHz double-clocked strobes.
cycle).
❒ Provides address decoding for:	•	Integrated Functions:
16-bit I/O addressing.
		❒ I/O APIC to provide 24 interrupts.
32-bit memory mapped I/O addressing.
		❒ Six copies of PCLKOUT signals to its PCI devices.
44-bit prefetchable memory addressing (upstream only).
VGA addressing.

❒Includes downstream LOCK# capabilities.

❒Fast Back-to-Back cycles (upstream only).

❒Bus parking.

❒Implements Delayed Transaction for;

PCI configuration read/written I/O read, and memory read commands (downstream).

Memory read, I/O read and I/O write commands (upstream).

hSa EC6™ a

The P64H provides the interface to a PCI 64-bit 66 MHz bus interface supporting both 64-bit and 32-bit 33 MHz or 66 MHz devices.

This interface implementation is compliant with PCI Rev 2.2 Specification, and it can support up to 533 MB/sec data transfer rates.

It also supports PCI master capabilities and the Adaptec AIC 7892 16-bit Ultra 160 SCSI controller.

A table on page 68 shows the P64H interrupts.

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