
7 a• J½p
Host Bus
accept another request. The MCH, as target device, then requests the bus again when it is ready to respond, and sends the requested data packet. Up to eight transactions are allowed to be outstanding at any given time.
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The Pentium III processor has several features that enhance performance:
•Dual Independent Bus architecture, (supporting level cache sizes of
i256 KB) plus a
•MMX2 technology, which gives higher performance for media, communications and 3D applications.
•Dynamic execution to speed up software performance.
•Internet Streaming SIMD Extensions for enhanced floating point and 3D application performance.
•Processor Serial Number is an electronic number incorporated in the processor. If enabled, the Processor Serial Number can serve as a means of identifying the system. By default, this option is set to Disabled in the
l program.
•Uses multiple
The Pentium III processor is packaged in a
There are two Slot 1 processor slots, along with one VRM (Voltage Regulation Module) socket. A single Pentium III processor for Slot 1 is powered through an onboard voltage regulator.
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Single processor models can be upgraded to a dual processor system by installing a second processor in the vacant slot. The second processor must be a Pentium III processor for Slot 1 of the same speed as the first. The VRM supplied with the processor accessory kit is installed in the vacant VRM slot. The second processor is powered through the VRM.
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