7 at• J½p
Assigned Device Interrupts
| o I | This mode is implemented with APIC controllers in the |
| ICH and P64H and used during boot time. The virtual wire mode allows the | |
| transition to the “symmetric I/O mode”. In the virtual wire mode, only one | |
| processor executes instructions. | |
| l a:g I | This mode is implemented with APIC controllers in |
| the ICH and P64H, and allows for multiple processor operations. | |
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| |
eflT | In “PIC mode” and “virtual wire mode”, the PCI interrupts are routed to the | |
| INT line. In the “symmetric I/O mode”, the PCI interrupts are routed to the | |
| I/O APIC controllers and forwarded over an APIC bus to the processors. | |
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XKQ Q” ‘t Tx”t
PCI devices generate interrupt requests using up to four PCI interrupt request lines (INTA#, INTB#, INTC#, and INTD#).
PCI interrupts can be shared; several devices can use the same interrupt. However, optimal system performance is reached when minimizing the sharing of interrupts. Refer to page 68 for a table of the PCI device interrupts.
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