Intel 8XC196Kx, 8XC196Jx, 8XC196Lx State Times at Various Frequencies, 12 MHz, 16 MHz, 20 MHz

8XC196LX SUPPLEMENT

XTAL1

t t

1 State Time 1 State Time

PH1

PH2

CLKOUT

Phase 1 Phase 2 Phase 1 Phase 2

A0805-01

Figure 2-3. Internal Clock Phases (Assumes PLL is Bypassed)

The combined period of phase 1 and phase 2 of the internal CLKOUT signal defines the basic time unit known as a state time or state. Table 2-2 lists state time durations at various frequencies.

Table 2-2. State Times at Various Frequencies

f
(Frequency Input to the	State Time
Divide-by-two Circuit)
8 MHz	250 ns
12 MHz	167 ns
16 MHz	125 ns
20 MHz	100 ns

The following formulas calculate the frequency of PH1 and PH2, the duration of a state time, and the duration of a clock period (t).

f	2	1
PH1 (in MHz) = --= PH2	State Time (in µs) = --	t = --
2	f	f

Because the device can operate at many frequencies, this manual defines time requirements (such as instruction execution times) in terms of state times rather than specific measurements. Datasheets list AC characteristics in terms of clock periods (t; sometimes called Tosc).

Figure 2-4 illustrates the timing relationships between the input frequency (FXTAL1), the operating frequency (f), and the CLKOUT signal with each PLLEN pin configuration. Table 2-3 details the relationships between the input frequency (FXTAL1), the PLLEN pin, the operating frequency (f), the clock period (t), and state times.

2-4