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Motorola CPCI-6020 manual Diagnostic Test Groups, Diagnostic Tests, Test Set Description

Models: CPCI-6020

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Diagnostic Tests	Firmware

Test sets marked with an asterisk (*) are not available on the CPCI-6020, unless SCSI or video PMCs are installed.

Table 5-2 Diagnostic Test Groups

Test Set	Description

CL1283	Parallel Interface (CL1283)

DEC	DECchip 21x4x EIDE Tests

ISABRDGE	PCI/ISA Bridge Tests

KBD8730x	PC8730x Keyboard/Mouse Tests*

L2CACHE	Level 2 Cache Tests

NCR	NCR 53C8xx SCSI-2 I/O Processor Tests*

PAR8730x	PC8730x Parallel Port Test*

PCIBUS	Generic PCI/PMC Slot Test

RAM	Random Access Memory Tests

RTC	MK48Txx Real-Time Clock Tests

SCC	Serial Communications Controller Tests

UART	Serial Input/Output UART Tests

VGA54xx	Video Graphics Tests*

Z8536	Zilog Z8536 Counter/Timer Tests*

CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)

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Motorola CPCI-6020 manual Diagnostic Test Groups, Diagnostic Tests, Test Set Description

Contents

CPCI-6020 CompactPCI Single Board Computer Contact Address Contents Contents Controls, LEDs, and ConnectorsContents Firmware Cnfg and ENV Commands Contents List of Tables List of Tables List of Figures List of Figures About this Manual Overview of ContentsAbout this Manual AbbreviationsAbbreviation Description Bold ConventionsAbout this Manual Abbreviation Description Notation DescriptionAbout this Manual Notation Description Summary of ChangesPart Number Publication Date Description Reader-comments@ecc.mot.com Comments and SuggestionsAbout this Manual EMC Safety NotesSafety Notes Operation InstallationSafety Notes Environment Rear Transition ModuleSafety Notes EMV SicherheitshinweiseSicherheitshinweise Betrieb Installation Umweltschutz Sicherheitshinweise Introduction FeaturesFeatures Feature DescriptionCPCI-6020 5E Only Standard CompliancesBoard Standard Compliances IntroductionStandard CompliancesModel Number Description Ordering InformationSupported Board Models Ordering InformationIntroductionIntroduction Board AccessoriesOverview Hardware Preparation and InstallationUnpacking and Inspecting the Board Hardware Preparation and Installation Overview of Start-up ProcedureStartup Overview Environmental Requirements Environmental and Power RequirementsEquipment RequiredHardware Preparation and Installation Equipment RequiredCharacteristics Operating Nonoperating SpecificationsCore Thermal Requirements Hardware ConfigurationPower Requirements Baseboard and RTM Power RequirementsCPCI-6020 Baseboard Preparation Jumper Settings Jumper SettingsFlash Bank Selection PMC 66 MHz Disable Harrier Power Up Configuration HeaderEnable/Disable +12 V and -12 V Use Pin # Signal Hardware InstallationEnable Write-Protect for Entire Flash on Bank a Remote SwitchProcedure PMC Module InstallationPMC Module Installation CompactFlash Memory Card Installation Before You Install or Remove a Board Before You Install or Remove a BoardUse Caution When Installing or Removing Boards Watch for Bent Pins or Other DamageUnderstanding Hot Swap Recognize Different Injector/Ejector Lever Types Recognize Different Injector/Ejector Lever TypesCard Rail Color Glyph Usage Slot Usage IndicatorsVerify Slot Usage Preserve EMI ComplianceInstalling and Removing a Module Installing and Removing a ModuleInstalling and Removing a Module Removal Procedure Startup and Operation Power-up ProcedureSystem Considerations System ConsiderationsSystem Considerations CPCI-6020 Baseboard Layout Controls, LEDs, and ConnectorsPin Signal Front Panel Connectors and LEDsEthernet Connector Pin Assignments Controls, LEDs, and ConnectorsUSB Port Front Panel Asynchronous Serial PortFront Panel USB ports COM1 Pin AssignmentsCompactPCI Bus Connectors Connector Pin AssignmentsABORT# Switch RESET# SwitchPin Row a Row B Row C Row D Row E J1 CompactPCI ConnectorJ2 CompactPCI Connector CompactPCI Bus ConnectorsControls, LEDs, and ConnectorsCompactPCI Bus Connectors CompactPCI User I/O Connector CompactPCI User I/O ConnectorJ3 CompactPCI User I/O Connector Signal Descriptions for the J3 Connector10 J4 Local PCI Expansion Connector Pinout 12 J5 Signal Descriptions 11 J5 User I/O ConnectorSignal Description Spkrocl Controls, LEDs, and ConnectorsCompactPCI User I/O ConnectorResetl IntrqPin Pin Name Memory Mezzanine Connectors13 J8 and J27 Memory Mezzanine Connector Memory Mezzanine ConnectorsControls, LEDs, and Connectors14 PMC Connector J11 Pin Assignments PCI Mezzanine Card PMC ConnectorsRST# Motrsvd 15 J12 PMC Connector J12 Pin AssignmentsFRAME# GND IRDY# DEVSEL# LOCK# SDONE# SBO# PAR VIO TRST# TMS TDO TDI GND Pcirsvd Motrsvd16 PMC Connector J13 Pin Assignments GND GND a 17 PMC Connector J14 Pin AssignmentsWPL GND Lock Down Flash Enable Jumper18 J17 Lock Down Flash Enable Jumper Controls, LEDs, and ConnectorsLock Down Flash Enable JumperRemote Switch Connector PMC 66 Mhz Disable JumperFlash Write Protect Enable Jumper 23 J24 Xport Flash Bank Select Header Harrier Power Up ConfigurationXport Flash Bank Select Header RISCWatch Header25 J28 Debug Connector Mictor Debug ConnectorMictor Debug ConnectorControls, LEDs, and Connectors PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 Controls, LEDs, and ConnectorsMictor Debug ConnectorPDPAR6 PDPAR7 PDPAR0 PDPAR1PDPAR2 PDPAR3 PDPAR4 PDPAR5TT3 TT0 TSIZ0TT1 TSIZ1 TT2 TSIZ2CPUREQ1L INT0L Hresetl NaprunSRESET0DL Qackl Hresetl CputdoMictor Debug Connector Functional Description Functional Description Block DiagramPCI Bus a Resources Local PCI Bus ResourcesLocal PCI Bus Resources ISA Bridge, Including Eide Function PMC Slot PCI Bus B ResourcesPCI Bus B Resources PrPMC Signal Pin Number Support Special Function Processor PMC PinsSecondary Ethernet Channel 2 L2 Cache Processor Bus ResourcesHarrier System Memory Controller and PCI Host Bridge Asic ProcessorHarrier Power-Up Configuration Settings Harrier Power-Up ConfigurationDual Harrier Assignments Harrier Power-Up ConfigurationFunctional Description Harrier a Memory Bus Debug ConnectorECC Memory Bus Resources PPC Bus ArbitrationExpansion Sdram Memory Mezzanine Size Options Harrier Xport ResourcesHarrier B Memory Bus 3 RAM500 Memory MezzanineHarrier A, Channel Harrier A, Channel 0 Onboard Bank a FlashHarrier A, Channel 1 Socketed Bank B Flash Harrier A, Channel 2 NVRAM, RTC, External Register Set1 I2C Bus Resources Serial Eeprom 3 32-Bit TimersWatchdog Timers Other Harrier ResourcesPPC to PCI Clock Ratios Other Board ResourcesMiscellaneous Control and Status Clock GeneratorBoard Reset Logic Onboard Power SuppliesOnboard Power Supplies Devices Bus Reset Sources and Devices AffectedLocal Processo Harrier CompactPCI Device AffectedABORT# and RESET# Switches Soft ResetFront Panel Resources HSC Bridge Board Interface Hot Swap SupportHigh Availability Support On-Board LEDsSystem Slot Hot Swap Local CompactPCI Bus InterfaceSecondary Bus Arbitration Secondary Bus Tri-StatingFunctional Description Eide Interface Eide InterfaceEthernet Interface PMC Interface Module PIMAsynchronous Serial Ports 19 I/O Signal Multiplexing IomuxAsynchronous Serial Ports Synchronous Serial PortsRI4 Multiplexing Sequence of the Iomx FunctionMxdo From CPCI-6020 Mxdi From CPCI-6020-MCPTM-01 TM4Serial Interface Modules SIM Serial Interface Modules SIM104 PMC Interface Module Form FactorFloppy Disk Port PMC Interface ConnectorHost I/O Connector Speaker Port106 PPCBug Overview FirmwarePPCBug Basics Firmware Memory RequirementsPPCBug Implementation MPU, Hardware and Firmware InitializationMPU, Hardware and Firmware Initialization 110 Using PPCBugDebugger Commands Firmware Using PPCBugDebugger Commands Debugger CommandsCommand Description 112 FirmwareDebugger CommandsDebugger CommandsFirmware 114 Diagnostic TestsFirmwareDiagnostic Tests Command Description Write LoopDiagnostic Tests Diagnostic Test GroupsTest Set Description 116 RAM500 Description RAM500 Memory Expansion Module118 RAM500 Module InstallationRAM500 Sdram Memory Size Options RAM500 Memory Expansion ModuleFeatures RAM500 Feature SummarySrom Host Clock Logic RAM500 ConnectorsBottom Side Memory Expansion Connector P1 RAM500 Bottom Side Connector P1 Pin AssignmentsDQ08 DQ09 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CKD06 CKD07 BA1 BA0 CKD00 CKD01 CKD02 CKD03 CKD04 CKD05122 RAM500 Top Side Connector J1 Pin Assignments Top Side Memory Expansion Connector J1Top Side Memory Expansion Connector J1 A1SPD MEZZ2L CSE0LDQMB1 SDASDRAMCLK4 RAM500 Programming IssuesRAM500 Programming IssuesRAM500 Memory Expansion Module GND SDRAMCLK3126 General Description Transition Module Preparation and Installation128 Transition Module Preparation and InstallationComponent Layout Component Layout130 Rear Panel ConnectorsUnpacking and Inspecting the RTM Unpacking and Inspecting the RTMPreparing the Transition Module Serial Ports 1Model Number Serial Ports 3SIM Model Numbers InterfaceSerial Interface Module Circuitry Serial Interface Module Circuitry134 Port Configuration Port Configuration136 Installing the SIMsInstalling the SIMs 138 Installing the PIMInstalling the PIM 140 Installing and Removing the Transition ModuleType Number Description Connectors and CablesRear Transition Module Connectors/Headers Connectors and CablesMCPTM-01 Rear Transition Module CablesPLD Jtag Part Number DescriptionConnector Pin Assignments CompactPCI ConnectorsPMC I/O Module Connector PMC I/O Module Host I/O Connector Pin Assignments144 PMC I/O Module PMC I/O Connector Pin AssignmentsIN2RI Outrts Outrxd Outtxd I2CCLK I2CDATPMC I/O Module PMC I/O Connector Pin Assignments COM1 Connector Pin Assignments 3 10BaseT/100BaseTx Connectors4 COM1 Connector 10BaseT/100BaseTx Connector Pin AssignmentsEide Header Pin Assignments 5 COM2 HeaderEide Header COM2 Header Pin Assignments10 Floppy Header Pin Assignments 8 +5VDC Power Connector11 +5Vdc Power Connector Floppy Port HeaderKeyboard/Mouse Connector Keyboard/Mouse Connector12 Keyboard/Mouse Connector Pin Assignments 13 Sync/Async Serial Connector Pin AssignmentsSpeaker Output Header 14 Speaker Output Connector Pin Assignments150 Cnfg Configure Board Information Cnfg and ENV CommandsDetail Value 152 Configuring the PPCBug ParametersCnfg and ENV Commands ENV Set EnvironmentProbe System for Supported I/O Controllers Y/N = Y? Configuring the PPCBug Parameters154 Nvram Bootlist GEV.fw-boot-path Boot Enable Y/N = N?ROM Boot Enable Y/N = N? 156 Watchdog shutdown at board reset Y/N = N? 158 Memory Size Enable Y/N = Y?Serial Startup Code Master Enable Y/N = N? 160 Table A-1 Embedded Communications Computing Documents Related DocumentationEmbedded Communications Computing Documents Manufacturers’ DocumentsTable A-3 Related Specifications Related SpecificationsMPR-PPC-RPU-02 Related SpecificationsRelated DocumentationNumber or Search Document Title and Source Term164 Related DocumentationIndex Symbols166 167 168