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Motorola CPCI-6020 TT0 TSIZ0, TT1 TSIZ1, TT2 TSIZ2, TT3, TT4, Cil, Wtl, Globall, Sharedl Dbwol

Models: CPCI-6020

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Controls, LEDs, and ConnectorsMictor Debug Connector

Table 3-25 J28 Debug Connector (continued)

	Pin	Signal		Signal	Pin

	115	TT0		TSIZ0	116

	117	TT1		TSIZ1	118

	119	TT2		TSIZ2	120

	121	TT3		Reserved	122

	123	TT4		Reserved	124

	125	CI_L		Reserved	126
			+3.3 V
	127	WT_L	+3.3 V	Reserved	128
	127	WT_L		Reserved	128

	129	GLOBAL_L		Reserved	130

	131	SHARED_L		DBWO_L	132

	133	AACK_L		TS_L	134

	135	ARTY_L		XATS_L	136

	137	DRTY_L		TBST_L	138

	139	TA_L		Reserved	140

	141	TEA_L		Reserved	142

	143	Reserved		DBG_L	144

	145	Reserved		DBB_L	146

	147	Reserved		ABB_L	148

	149	TCLK_OUT		CPUGNT0_L	150

	151	Reserved		CPUREQ0_L	152

78	CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)

Image 78

Motorola CPCI-6020 TT0 TSIZ0, TT1 TSIZ1, TT2 TSIZ2, TT3, TT4, Cil, Wtl, Globall, Sharedl Dbwol, Aackl TSL, Artyl Xatsl

Contents

CPCI-6020 CompactPCI Single Board Computer Contact Address Contents Controls, LEDs, and Connectors ContentsContents Firmware Cnfg and ENV Commands Contents List of Tables List of Tables List of Figures List of Figures Overview of Contents About this ManualAbbreviations About this ManualAbbreviation Description Notation Description ConventionsAbout this Manual Abbreviation Description BoldSummary of Changes About this Manual Notation DescriptionPart Number Publication Date Description Comments and Suggestions Reader-comments@ecc.mot.comAbout this Manual Safety Notes EMCSafety Notes Installation OperationSafety Notes Rear Transition Module EnvironmentSafety Notes Sicherheitshinweise EMVSicherheitshinweise Betrieb Installation Umweltschutz Sicherheitshinweise Feature Description FeaturesFeatures IntroductionIntroductionStandard Compliances Standard CompliancesBoard Standard Compliances CPCI-6020 5E OnlyOrdering InformationIntroduction Ordering InformationSupported Board Models Model Number DescriptionBoard Accessories IntroductionHardware Preparation and Installation OverviewUnpacking and Inspecting the Board Overview of Start-up Procedure Hardware Preparation and InstallationStartup Overview Equipment Required Environmental and Power RequirementsEquipment RequiredHardware Preparation and Installation Environmental RequirementsSpecifications Characteristics Operating NonoperatingCore Baseboard and RTM Power Requirements Hardware ConfigurationPower Requirements Thermal RequirementsCPCI-6020 Baseboard Preparation Jumper Settings Jumper SettingsFlash Bank Selection Harrier Power Up Configuration Header PMC 66 MHz DisableEnable/Disable +12 V and -12 V Use Remote Switch Hardware InstallationEnable Write-Protect for Entire Flash on Bank a Pin # SignalPMC Module Installation ProcedurePMC Module Installation CompactFlash Memory Card Installation Before You Install or Remove a Board Before You Install or Remove a BoardWatch for Bent Pins or Other Damage Use Caution When Installing or Removing BoardsUnderstanding Hot Swap Recognize Different Injector/Ejector Lever Types Recognize Different Injector/Ejector Lever TypesPreserve EMI Compliance Slot Usage IndicatorsVerify Slot Usage Card Rail Color Glyph UsageInstalling and Removing a Module Installing and Removing a ModuleInstalling and Removing a Module Removal Procedure Power-up Procedure Startup and OperationSystem Considerations System ConsiderationsSystem Considerations Controls, LEDs, and Connectors CPCI-6020 Baseboard LayoutControls, LEDs, and Connectors Front Panel Connectors and LEDsEthernet Connector Pin Assignments Pin SignalCOM1 Pin Assignments Front Panel Asynchronous Serial PortFront Panel USB ports USB PortRESET# Switch Connector Pin AssignmentsABORT# Switch CompactPCI Bus ConnectorsCompactPCI Bus Connectors J1 CompactPCI ConnectorJ2 CompactPCI Connector Pin Row a Row B Row C Row D Row EControls, LEDs, and ConnectorsCompactPCI Bus Connectors Signal Descriptions for the J3 Connector CompactPCI User I/O ConnectorJ3 CompactPCI User I/O Connector CompactPCI User I/O Connector10 J4 Local PCI Expansion Connector Pinout 11 J5 User I/O Connector 12 J5 Signal DescriptionsSignal Description Intrq Controls, LEDs, and ConnectorsCompactPCI User I/O ConnectorResetl SpkroclMemory Mezzanine ConnectorsControls, LEDs, and Connectors Memory Mezzanine Connectors13 J8 and J27 Memory Mezzanine Connector Pin Pin NamePCI Mezzanine Card PMC Connectors 14 PMC Connector J11 Pin AssignmentsTRST# TMS TDO TDI GND Pcirsvd Motrsvd 15 J12 PMC Connector J12 Pin AssignmentsFRAME# GND IRDY# DEVSEL# LOCK# SDONE# SBO# PAR VIO RST# Motrsvd16 PMC Connector J13 Pin Assignments 17 PMC Connector J14 Pin Assignments GND GND aControls, LEDs, and ConnectorsLock Down Flash Enable Jumper Lock Down Flash Enable Jumper18 J17 Lock Down Flash Enable Jumper WPL GNDPMC 66 Mhz Disable Jumper Remote Switch ConnectorFlash Write Protect Enable Jumper RISCWatch Header Harrier Power Up ConfigurationXport Flash Bank Select Header 23 J24 Xport Flash Bank Select HeaderMictor Debug Connector 25 J28 Debug ConnectorMictor Debug ConnectorControls, LEDs, and Connectors Controls, LEDs, and ConnectorsMictor Debug Connector PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9PDPAR4 PDPAR5 PDPAR0 PDPAR1PDPAR2 PDPAR3 PDPAR6 PDPAR7TT2 TSIZ2 TT0 TSIZ0TT1 TSIZ1 TT3Hresetl Cputdo Hresetl NaprunSRESET0DL Qackl CPUREQ1L INT0LMictor Debug Connector Functional Description Block Diagram Functional DescriptionLocal PCI Bus Resources PCI Bus a ResourcesLocal PCI Bus Resources ISA Bridge, Including Eide Function PCI Bus B Resources PMC SlotPCI Bus B Resources Special Function Processor PMC Pins PrPMC Signal Pin Number SupportSecondary Ethernet Channel Processor Processor Bus ResourcesHarrier System Memory Controller and PCI Host Bridge Asic 2 L2 CacheHarrier Power-Up Configuration Harrier Power-Up Configuration SettingsDual Harrier Assignments Harrier Power-Up ConfigurationFunctional Description PPC Bus Arbitration Debug ConnectorECC Memory Bus Resources Harrier a Memory Bus3 RAM500 Memory Mezzanine Harrier Xport ResourcesHarrier B Memory Bus Expansion Sdram Memory Mezzanine Size OptionsHarrier A, Channel 2 NVRAM, RTC, External Register Set Harrier A, Channel 0 Onboard Bank a FlashHarrier A, Channel 1 Socketed Bank B Flash Harrier A, ChannelOther Harrier Resources 3 32-Bit TimersWatchdog Timers 1 I2C Bus Resources Serial EepromClock Generator Other Board ResourcesMiscellaneous Control and Status PPC to PCI Clock RatiosOnboard Power Supplies Board Reset LogicOnboard Power Supplies CompactPCI Device Affected Reset Sources and Devices AffectedLocal Processo Harrier Devices BusSoft Reset ABORT# and RESET# SwitchesFront Panel Resources On-Board LEDs Hot Swap SupportHigh Availability Support HSC Bridge Board InterfaceSecondary Bus Tri-Stating Local CompactPCI Bus InterfaceSecondary Bus Arbitration System Slot Hot SwapPMC Interface Module PIM Eide InterfaceEthernet Interface Functional Description Eide InterfaceSynchronous Serial Ports 19 I/O Signal Multiplexing IomuxAsynchronous Serial Ports Asynchronous Serial PortsTM4 Multiplexing Sequence of the Iomx FunctionMxdo From CPCI-6020 Mxdi From CPCI-6020-MCPTM-01 RI4Serial Interface Modules SIM Serial Interface Modules SIMPMC Interface Module Form Factor 104Speaker Port PMC Interface ConnectorHost I/O Connector Floppy Disk Port106 Firmware PPCBug OverviewPPCBug Basics MPU, Hardware and Firmware Initialization Memory RequirementsPPCBug Implementation FirmwareMPU, Hardware and Firmware Initialization Firmware Using PPCBug Using PPCBugDebugger Commands 110Debugger Commands Debugger CommandsCommand Description FirmwareDebugger Commands 112Debugger CommandsFirmware Command Description Write Loop Diagnostic TestsFirmwareDiagnostic Tests 114Diagnostic Test Groups Diagnostic TestsTest Set Description 116 RAM500 Memory Expansion Module RAM500 DescriptionRAM500 Memory Expansion Module RAM500 Module InstallationRAM500 Sdram Memory Size Options 118RAM500 Feature Summary FeaturesSrom RAM500 Bottom Side Connector P1 Pin Assignments RAM500 ConnectorsBottom Side Memory Expansion Connector P1 Host Clock LogicDQ08 DQ09 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CKD00 CKD01 CKD02 CKD03 CKD04 CKD05 CKD06 CKD07 BA1 BA0122 Top Side Memory Expansion Connector J1 RAM500 Top Side Connector J1 Pin AssignmentsTop Side Memory Expansion Connector J1 SDA CSE0LDQMB1 A1SPD MEZZ2LGND SDRAMCLK3 RAM500 Programming IssuesRAM500 Programming IssuesRAM500 Memory Expansion Module SDRAMCLK4126 Transition Module Preparation and Installation General DescriptionTransition Module Preparation and Installation 128Component Layout Component LayoutRear Panel Connectors 130Serial Ports 1 Unpacking and Inspecting the RTMPreparing the Transition Module Unpacking and Inspecting the RTMInterface Serial Ports 3SIM Model Numbers Model NumberSerial Interface Module Circuitry Serial Interface Module Circuitry134 Port Configuration Port ConfigurationInstalling the SIMs 136Installing the SIMs Installing the PIM 138Installing the PIM Installing and Removing the Transition Module 140Connectors and Cables Connectors and CablesRear Transition Module Connectors/Headers Type Number DescriptionPart Number Description Rear Transition Module CablesPLD Jtag MCPTM-01PMC I/O Module Host I/O Connector Pin Assignments CompactPCI ConnectorsPMC I/O Module Connector Connector Pin AssignmentsOutrts Outrxd Outtxd I2CCLK I2CDAT PMC I/O Module PMC I/O Connector Pin AssignmentsIN2RI 144PMC I/O Module PMC I/O Connector Pin Assignments 10BaseT/100BaseTx Connector Pin Assignments 3 10BaseT/100BaseTx Connectors4 COM1 Connector COM1 Connector Pin AssignmentsCOM2 Header Pin Assignments 5 COM2 HeaderEide Header Eide Header Pin AssignmentsFloppy Port Header 8 +5VDC Power Connector11 +5Vdc Power Connector 10 Floppy Header Pin Assignments13 Sync/Async Serial Connector Pin Assignments Keyboard/Mouse Connector12 Keyboard/Mouse Connector Pin Assignments Keyboard/Mouse Connector14 Speaker Output Connector Pin Assignments Speaker Output Header150 Cnfg and ENV Commands Cnfg Configure Board InformationDetail Value ENV Set Environment Configuring the PPCBug ParametersCnfg and ENV Commands 152Configuring the PPCBug Parameters Probe System for Supported I/O Controllers Y/N = Y?Nvram Bootlist GEV.fw-boot-path Boot Enable Y/N = N? 154ROM Boot Enable Y/N = N? 156 Watchdog shutdown at board reset Y/N = N? Memory Size Enable Y/N = Y? 158Serial Startup Code Master Enable Y/N = N? 160 Manufacturers’ Documents Related DocumentationEmbedded Communications Computing Documents Table A-1 Embedded Communications Computing DocumentsRelated Specifications Table A-3 Related SpecificationsDocument Title and Source Term Related SpecificationsRelated DocumentationNumber or Search MPR-PPC-RPU-02Related Documentation 164Symbols Index166 167 168