Motorola CPCI-6020 manual Harrier Power Up Configuration Header, PMC 66 MHz Disable

Hardware Preparation and Installation Harrier Power Up Configuration Header

To enable Flash Bank A, place a jumper across pins 1 and 2 of header J24. To enable Flash Bank B, place a jumper across pins 2 and 3 of header J24.

J24

1-2

2-3

Jumper On

Flash Bank A Enabled (32 MB, soldered)

Flash Bank B Enabled (1 MB, sockets) Factory Configuration

2.8.2Harrier Power Up Configuration Header

A 2 mm, 8-pin low profile header located on side 1 of the CPCI-6020 provides the means to change some of the Harrier power up configuration settings. The pin assignments for this header, along with the power up setting with the jumper on or off, are as follows (boards are shipped with all jumpers off):

J22	Jumper On	Jumper Off
1-2	PUST0 = 0	PUST0 = 1
	Harrier PUST Bit 0 in GCSR Register
3-4	PUST1 = 0	PUST1 = 1
	Harrier PUST Bit 1 in GCSR Register
5-6	PUST2 = 0	PUST2 = 1
	Harrier PUST Bit 2 in GCSR Register
7-8	PUST3 = 0	PUST3 = 1
	Harrier PUST Bit 2 in GCSR Register

2.8.3PMC 66 MHz Disable

This 0.1 inch, 2-pin header (J21) located on the CPCI-6020 is used to disable 66 MHz operation on PCI Bus B. When a jumper is installed between pins 1 and 2, PCI Bus B will operate at 33 MHz regardless of whether the PMC is capable of 66 MHz. This prevents the secondary Ethernet controller from being disabled if a 66 MHz capable PMC is installed. The jumper pulls the M66EN signal low so the PMC can be aware that the bus is operating at 33 MHz.

J21

GND

M66EN

2.8.4Enable/Disable +12 V and -12 V Use

This 0.1 inch, 2-pin header (J18) located on the CPCI-6020 is used to disable +/-12 V on the board.

42 CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)