CPUREQ1L INT0L, CPUGNT1L MCHK0L, WDT1TOL Smil

Mictor Debug ConnectorControls, LEDs, and Connectors

Table 3-25 J28 Debug Connector (continued)

Pin	Signal		Signal	Pin

153	CPUREQ1_L		INT0_L	154

155	CPUGNT1_L		MCHK0_L	156

157	WDT1TO_L		SMI_L	158

159	WDT2TO_L		CKSTPI_L	160

161	L2BR_L		CKSTPO_L	162

163	L2BG_L		HALTED	164

165	L2CLAIM_L		TLBISYNC_L	166

167	Reserved		TBEN	168

169	Reserved		Reserved	170

171	Reserved	GND	Reserved	172

173	SRESET_L		Reserved	174

175	HRESET_L		NAPRUN	176

177	SRST1_L		QREQ_L	178

179	SRESET0_D_L		QACK_L	180

181	HRESET_L		CPUTDO	182

183	GND		CPUTDI	184

185	CPUCLK		CPUTCK	186

187	CPUCLK		CPUTMS	188

189	CPUCLK		CPUTRST#	190

CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)

Page 79

Image 79

Motorola CPCI-6020 manual CPUREQ1L INT0L, CPUGNT1L MCHK0L, WDT1TOL Smil, WDT2TOL Ckstpil, L2BRL Ckstpol, L2BGL Halted, Tben

Contents

CPCI-6020 CompactPCI Single Board Computer Contact Address Contents Contents Controls, LEDs, and Connectors Contents Firmware Cnfg and ENV Commands Contents List of Tables List of Tables List of Figures List of Figures About this Manual Overview of Contents About this Manual AbbreviationsAbbreviation Description Bold ConventionsAbout this Manual Abbreviation Description Notation Description About this Manual Notation Description Summary of ChangesPart Number Publication Date Description Reader-comments@ecc.mot.com Comments and Suggestions About this Manual EMC Safety Notes Safety Notes Operation Installation Safety Notes Environment Rear Transition Module Safety Notes EMV Sicherheitshinweise Sicherheitshinweise Betrieb Installation Umweltschutz Sicherheitshinweise Introduction FeaturesFeatures Feature Description CPCI-6020 5E Only Standard CompliancesBoard Standard Compliances IntroductionStandard Compliances Model Number Description Ordering InformationSupported Board Models Ordering InformationIntroduction Introduction Board Accessories Overview Hardware Preparation and InstallationUnpacking and Inspecting the Board Hardware Preparation and Installation Overview of Start-up ProcedureStartup Overview Environmental Requirements Environmental and Power RequirementsEquipment RequiredHardware Preparation and Installation Equipment Required Characteristics Operating Nonoperating SpecificationsCore Thermal Requirements Hardware ConfigurationPower Requirements Baseboard and RTM Power Requirements CPCI-6020 Baseboard Preparation Jumper Settings Jumper SettingsFlash Bank Selection PMC 66 MHz Disable Harrier Power Up Configuration HeaderEnable/Disable +12 V and -12 V Use Pin # Signal Hardware InstallationEnable Write-Protect for Entire Flash on Bank a Remote Switch Procedure PMC Module Installation PMC Module Installation CompactFlash Memory Card Installation Before You Install or Remove a Board Before You Install or Remove a Board Use Caution When Installing or Removing Boards Watch for Bent Pins or Other DamageUnderstanding Hot Swap Recognize Different Injector/Ejector Lever Types Recognize Different Injector/Ejector Lever Types Card Rail Color Glyph Usage Slot Usage IndicatorsVerify Slot Usage Preserve EMI Compliance Installing and Removing a Module Installing and Removing a Module Installing and Removing a Module Removal Procedure Startup and Operation Power-up Procedure System Considerations System Considerations System Considerations CPCI-6020 Baseboard Layout Controls, LEDs, and Connectors Pin Signal Front Panel Connectors and LEDsEthernet Connector Pin Assignments Controls, LEDs, and Connectors USB Port Front Panel Asynchronous Serial PortFront Panel USB ports COM1 Pin Assignments CompactPCI Bus Connectors Connector Pin AssignmentsABORT# Switch RESET# Switch Pin Row a Row B Row C Row D Row E J1 CompactPCI ConnectorJ2 CompactPCI Connector CompactPCI Bus Connectors Controls, LEDs, and ConnectorsCompactPCI Bus Connectors CompactPCI User I/O Connector CompactPCI User I/O ConnectorJ3 CompactPCI User I/O Connector Signal Descriptions for the J3 Connector 10 J4 Local PCI Expansion Connector Pinout 12 J5 Signal Descriptions 11 J5 User I/O ConnectorSignal Description Spkrocl Controls, LEDs, and ConnectorsCompactPCI User I/O ConnectorResetl Intrq Pin Pin Name Memory Mezzanine Connectors13 J8 and J27 Memory Mezzanine Connector Memory Mezzanine ConnectorsControls, LEDs, and Connectors 14 PMC Connector J11 Pin Assignments PCI Mezzanine Card PMC Connectors RST# Motrsvd 15 J12 PMC Connector J12 Pin AssignmentsFRAME# GND IRDY# DEVSEL# LOCK# SDONE# SBO# PAR VIO TRST# TMS TDO TDI GND Pcirsvd Motrsvd 16 PMC Connector J13 Pin Assignments GND GND a 17 PMC Connector J14 Pin Assignments WPL GND Lock Down Flash Enable Jumper18 J17 Lock Down Flash Enable Jumper Controls, LEDs, and ConnectorsLock Down Flash Enable Jumper Remote Switch Connector PMC 66 Mhz Disable JumperFlash Write Protect Enable Jumper 23 J24 Xport Flash Bank Select Header Harrier Power Up ConfigurationXport Flash Bank Select Header RISCWatch Header 25 J28 Debug Connector Mictor Debug ConnectorMictor Debug ConnectorControls, LEDs, and Connectors PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 Controls, LEDs, and ConnectorsMictor Debug Connector PDPAR6 PDPAR7 PDPAR0 PDPAR1PDPAR2 PDPAR3 PDPAR4 PDPAR5 TT3 TT0 TSIZ0TT1 TSIZ1 TT2 TSIZ2 CPUREQ1L INT0L Hresetl NaprunSRESET0DL Qackl Hresetl Cputdo Mictor Debug Connector Functional Description Functional Description Block Diagram PCI Bus a Resources Local PCI Bus ResourcesLocal PCI Bus Resources ISA Bridge, Including Eide Function PMC Slot PCI Bus B ResourcesPCI Bus B Resources PrPMC Signal Pin Number Support Special Function Processor PMC PinsSecondary Ethernet Channel 2 L2 Cache Processor Bus ResourcesHarrier System Memory Controller and PCI Host Bridge Asic Processor Harrier Power-Up Configuration Settings Harrier Power-Up ConfigurationDual Harrier Assignments Harrier Power-Up ConfigurationFunctional Description Harrier a Memory Bus Debug ConnectorECC Memory Bus Resources PPC Bus Arbitration Expansion Sdram Memory Mezzanine Size Options Harrier Xport ResourcesHarrier B Memory Bus 3 RAM500 Memory Mezzanine Harrier A, Channel Harrier A, Channel 0 Onboard Bank a FlashHarrier A, Channel 1 Socketed Bank B Flash Harrier A, Channel 2 NVRAM, RTC, External Register Set 1 I2C Bus Resources Serial Eeprom 3 32-Bit TimersWatchdog Timers Other Harrier Resources PPC to PCI Clock Ratios Other Board ResourcesMiscellaneous Control and Status Clock Generator Board Reset Logic Onboard Power SuppliesOnboard Power Supplies Devices Bus Reset Sources and Devices AffectedLocal Processo Harrier CompactPCI Device Affected ABORT# and RESET# Switches Soft ResetFront Panel Resources HSC Bridge Board Interface Hot Swap SupportHigh Availability Support On-Board LEDs System Slot Hot Swap Local CompactPCI Bus InterfaceSecondary Bus Arbitration Secondary Bus Tri-Stating Functional Description Eide Interface Eide InterfaceEthernet Interface PMC Interface Module PIM Asynchronous Serial Ports 19 I/O Signal Multiplexing IomuxAsynchronous Serial Ports Synchronous Serial Ports RI4 Multiplexing Sequence of the Iomx FunctionMxdo From CPCI-6020 Mxdi From CPCI-6020-MCPTM-01 TM4 Serial Interface Modules SIM Serial Interface Modules SIM 104 PMC Interface Module Form Factor Floppy Disk Port PMC Interface ConnectorHost I/O Connector Speaker Port 106 PPCBug Overview FirmwarePPCBug Basics Firmware Memory RequirementsPPCBug Implementation MPU, Hardware and Firmware Initialization MPU, Hardware and Firmware Initialization 110 Using PPCBugDebugger Commands Firmware Using PPCBug Debugger Commands Debugger CommandsCommand Description 112 FirmwareDebugger Commands Debugger CommandsFirmware 114 Diagnostic TestsFirmwareDiagnostic Tests Command Description Write Loop Diagnostic Tests Diagnostic Test GroupsTest Set Description 116 RAM500 Description RAM500 Memory Expansion Module 118 RAM500 Module InstallationRAM500 Sdram Memory Size Options RAM500 Memory Expansion Module Features RAM500 Feature SummarySrom Host Clock Logic RAM500 ConnectorsBottom Side Memory Expansion Connector P1 RAM500 Bottom Side Connector P1 Pin Assignments DQ08 DQ09 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CKD06 CKD07 BA1 BA0 CKD00 CKD01 CKD02 CKD03 CKD04 CKD05122 RAM500 Top Side Connector J1 Pin Assignments Top Side Memory Expansion Connector J1Top Side Memory Expansion Connector J1 A1SPD MEZZ2L CSE0LDQMB1 SDA SDRAMCLK4 RAM500 Programming IssuesRAM500 Programming IssuesRAM500 Memory Expansion Module GND SDRAMCLK3 126 General Description Transition Module Preparation and Installation 128 Transition Module Preparation and Installation Component Layout Component Layout 130 Rear Panel Connectors Unpacking and Inspecting the RTM Unpacking and Inspecting the RTMPreparing the Transition Module Serial Ports 1 Model Number Serial Ports 3SIM Model Numbers Interface Serial Interface Module Circuitry Serial Interface Module Circuitry 134 Port Configuration Port Configuration 136 Installing the SIMs Installing the SIMs 138 Installing the PIM Installing the PIM 140 Installing and Removing the Transition Module Type Number Description Connectors and CablesRear Transition Module Connectors/Headers Connectors and Cables MCPTM-01 Rear Transition Module CablesPLD Jtag Part Number Description Connector Pin Assignments CompactPCI ConnectorsPMC I/O Module Connector PMC I/O Module Host I/O Connector Pin Assignments 144 PMC I/O Module PMC I/O Connector Pin AssignmentsIN2RI Outrts Outrxd Outtxd I2CCLK I2CDAT PMC I/O Module PMC I/O Connector Pin Assignments COM1 Connector Pin Assignments 3 10BaseT/100BaseTx Connectors4 COM1 Connector 10BaseT/100BaseTx Connector Pin Assignments Eide Header Pin Assignments 5 COM2 HeaderEide Header COM2 Header Pin Assignments 10 Floppy Header Pin Assignments 8 +5VDC Power Connector11 +5Vdc Power Connector Floppy Port Header Keyboard/Mouse Connector Keyboard/Mouse Connector12 Keyboard/Mouse Connector Pin Assignments 13 Sync/Async Serial Connector Pin Assignments Speaker Output Header 14 Speaker Output Connector Pin Assignments150 Cnfg Configure Board Information Cnfg and ENV CommandsDetail Value 152 Configuring the PPCBug ParametersCnfg and ENV Commands ENV Set Environment Probe System for Supported I/O Controllers Y/N = Y? Configuring the PPCBug Parameters 154 Nvram Bootlist GEV.fw-boot-path Boot Enable Y/N = N? ROM Boot Enable Y/N = N? 156 Watchdog shutdown at board reset Y/N = N? 158 Memory Size Enable Y/N = Y? Serial Startup Code Master Enable Y/N = N? 160 Table A-1 Embedded Communications Computing Documents Related DocumentationEmbedded Communications Computing Documents Manufacturers’ Documents Table A-3 Related Specifications Related Specifications MPR-PPC-RPU-02 Related SpecificationsRelated DocumentationNumber or Search Document Title and Source Term 164 Related Documentation Index Symbols 166 167 168

Motorola CPCI-6020 CPUREQ1L INT0L, CPUGNT1L MCHK0L, WDT1TOL Smil, WDT2TOL Ckstpil, L2BRL Ckstpol

Models: CPCI-6020

Mictor Debug ConnectorControls, LEDs, and Connectors

Table 3-25 J28 Debug Connector (continued)

Pin

CPUREQ1_L

INT0_L

CPUGNT1_L

MCHK0_L

WDT1TO_L

SMI_L

WDT2TO_L

CKSTPI_L

L2BR_L

CKSTPO_L

L2BG_L

HALTED

L2CLAIM_L

TLBISYNC_L

TBEN

HRESET_L

NAPRUN

SRST1_L

QREQ_L

SRESET0_D_L

QACK_L

HRESET_L

CPUTDO

GND

CPUTDI

CPUCLK

CPUTCK

CPUCLK

CPUTMS

CPUCLK

CPUTRST#