Motorola CPCI-6020 manual RAM500 Connectors, Host Clock Logic, Serial Presence Detect SPD Data

RAM500 Memory Expansion Module Host Clock Logic

6.4.2Host Clock Logic

The host board provides four SDRAM clocks to the memory expansion connector. The frequency of the RAM500 CLKS is the same as the host board.

6.4.3Serial Presence Detect (SPD) Data

This register is partially described for the RAM500 within the CPCI-6020 Single Board Computer Programmer’s Reference Guide. The register is accessed through the I2C interface of the Harrier ASIC on the host board (CPCI-6020). The RAM500 SPD is software addressable by a unique address as follows: The first RAM500 attached to the host board has an SPD address of $AA. The second RAM500 attached to the top of the first RAM500 has an SPD address of $AC.

6.5RAM500 Connectors

RAM500 memory expansion modules are populated with one or two connectors. If the module is to be used in tandem with a second RAM500 module, the “bottom” module will have two connectors: one to mate with the CPCI-6020 host board (P1), and one to mate with the top RAM500 module (J1). The top RAM500 module has only one connector, since it needs to mate only with the RAM500 module directly underneath it and because an added connector on a tandem RAM500 configuration would exceed the height limitations in some backplanes. If only one RAM500 module is being used, a top module, single connector configuration is used.

A 4H plug and receptacle are used on both boards to provide a 4 millimeter stacking height between dual RAM500 cards and the host board.

The following subsections specify the pin assignments for the connectors on the RAM500.

6.5.1Bottom Side Memory Expansion Connector (P1)

The bottom side connector on the RAM500 is a 140-pin AMP 0.6 mm Free Height mating plug. This plug includes common ground contacts that mate with standard AMP receptacle assemblies or AMP GIGA assemblies with ground plates. A single memory expansion module will have 1 bank of SDRAM for a maximum of 256 MB of memory. Attaching a second memory module to the first module will provide 2 banks of SDRAM with a maximum of 512 MB.

Table 6-3 RAM500 Bottom Side Connector (P1) Pin Assignments

	Pin		Signal	Signal	Pin
	1		GND*	GND*	2
	3		DQ00	DQ01	4
	5		DQ02	DQ03	6
	7		DQ04	DQ05	8
	9		DQ06	DQ07	10
	11		+3.3 V	+3.3 V	12
120		CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)