10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

VLBUS

W/nR

A2-A15

LCLK

M/nIO

nRESET

IRQn

D0-D31

nRDYRTN

nBE0-nBE3

nADS

Delay 1 LCLK

nLRDYO.C.

simulated O.C.

nLDEV

W/nR

A2-A15

LCLK

AEN

RESETLAN91C111

INTR0

D0-D31

nRDYRTN

nBE0-nBE3

nADS

nCYCLE

nSRDYnLDEV

Figure 12.1 LAN91C111 on VL BUSHIGH-END ISA OR NON-BURST EISA MACHINES

On ISA machines, the LAN91C111 is accessed as a 16 bit peripheral. The signal connections are listed in the following table:

Table 12.2 High-End ISA or Non-Burst EISA Machines Signal Connectors
ISA BUS

LAN91C111

NOTES

 

SIGNAL

SIGNAL

 

 

 

 

 

 

A1-A15

A1-A15

Address bus used for I/O space and register decoding.

 

 

 

AEN

AEN

Qualifies valid I/O decoding - enabled access when low.

 

 

 

nIORD

nRD

I/O Read strobe - asynchronous read accesses. Address is valid before

 

 

leading edge.

 

 

 

 

 

Revision 1.91 (08-18-08)

100

SMSC LAN91C111 REV C

DATASHEET