10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

 

13

 

03

 

92

 

82

 

72

 

62

 

52

 

42

 

32

 

22

 

12

 

02

 

91

 

81

 

71

 

61

 

51

 

41

 

31

 

21

 

11

 

01

 

9

 

8

 

7

 

6

 

5

 

4

 

3

 

2

 

1

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0

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9D 8D 7D 6D 5D 4D 3D 2D 1D 0D

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T [A :1 ]0

ER AG [D :4 ]0

HP AY [D :4 ]0

O [P :1 ]0

S [T :1 ]0

 

CDM FO SE

 

GDE

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01 11 21 31 41 51 61 71 81 91 02 12 22 32 42 52 62 72 82 92 03 13

9

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3

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Figure 7.1 MI Serial Port Frame Timing Diagram

SMSC LAN91C111 REV C

23

Revision 1.91 (08-18-08)

DATASHEET