10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

REFERENCE

TIME (NS) INTERNAL MAU

VOLTAGE (V)

 

 

 

Q

111

0.15

 

 

 

R

111

0

 

 

 

S

111

-0.15

 

 

 

T

110

-1.0

 

 

 

U

100

-0.3

 

 

 

V

110

-0.7

 

 

 

W

90

-0.7

 

 

 

Transmit Level Adjust

The transmit output current level is derived from an internal reference voltage and the external resistor on RBIAS pin. The transmit level can be adjusted with either (1) the external resistor on the RBIAS pin, or (2) the four transmit level adjust bits in the PHY Ml serial port Configuration 1 register as shown in Table 7.2. The adjustment range is approximately -14% to +16% in 2% steps.

 

Table 7.2 Transmit Level Adjust

 

 

 

TLVL[3:0]

 

GAIN

 

 

 

0000

 

1.16

 

 

 

0001

 

1.14

 

 

 

0010

 

1.12

 

 

 

0011

 

1.10

 

 

 

0100

 

1.08

 

 

 

0101

 

1.06

 

 

 

0110

 

1.04

 

 

 

0111

 

1.02

 

 

 

1000

 

1.00

 

 

 

1001

 

0.98

 

 

 

1010

 

0.96

 

 

 

1011

 

0.94

 

 

 

1100

 

0.92

 

 

 

1101

 

0.90

 

 

 

1110

 

0.88

 

 

 

1111

 

0.86

 

 

 

Transmit Rise and Fall Time Adjust

The transmit output rise and fall time can be adjusted with the two transmit rise/fall time adjust bits in the PHY Ml serial port Configuration 1. The adjustment range is -0.25ns to +0.5ns in 0.25ns steps.

Revision 1.91 (08-18-08)

32

SMSC LAN91C111 REV C

DATASHEET