10/100 Non-PCI Ethernet Single Chip MAC + PHY

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DRIVER SEND

 

 

 

 

A LLO CATE

 

 

 

 

 

 

 

 

 

 

 

 

Choose Bank Select

Issue "Allocate Memory"

 

 

 

Register 2

 

 

 

 

 

 

 

 

 

 

Command to MMU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Call ALLO CATE

 

 

 

 

 

 

 

 

 

 

 

Read Interrupt Status Register

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Exit Driver Send

 

Yes

 

Allocation

No

 

 

 

 

 

 

Passed?

 

 

 

 

 

Read Allocation Result

 

 

 

 

 

 

 

 

Register

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

W rite Allocated Packet into

 

 

 

Store Data Buffer Pointer

 

 

Packet # Register

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

W rite Address Pointer Register

Clear "Ready for Packet" Flag

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Copy Part of TX Data Packet

 

 

 

Enable Allocation Interrupt

 

 

into RAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

W rite Source Address into

Proper Location

Copy Remaining TX Data

Packet into RAM

Enqueue Packet

Set "Ready for Packet" Flag

Return Buffers to Upper Layer

Return

Figure 10.5 Drive Send and Allocate RoutinesMEMORY PARTITIONING

Unlike other controllers, the LAN91C111 does not require a fixed memory partitioning between transmit and receive resources. The MMU allocates and de-allocates memory upon different events. An additional mechanism allows the CPU to prevent the receive process from starving the transmit memory allocation.

Memory is always requested by the side that needs to write into it, that is: the CPU for transmit or the MAC for receive. The CPU can control the number of bytes it requests for transmit but it cannot determine the number of bytes the receive process is going to demand. Furthermore, the receive process requests will be dependent on network traffic, in particular on the arrival of broadcast and

Revision 1.91 (08-18-08)

92

SMSC LAN91C111 REV C

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