SMSC LAN91C111 MIN, TYP, MAX, UNITS, PARAMETER, Figure 14.7 Address Latching for All Modes, Figure 14.8 Synchronous Write Cycle - nVLBUS=0

10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

t8

nADS

t9

Address, AEN, nBE[3:0] Valid

t25

nLDEV

Figure 14.7 Address Latching for All Modes

	PARAMETER	MIN	TYP	MAX	UNITS
t8	A1-A15, AEN, nBE[3:0] Setup to nADS Rising	8			ns
t9	A1-A15, AEN, nBE[3:0] Hold After nADS Rising	5			ns
t25	A4-A15, AEN to nLDEV Delay			30	ns

		t18
Clock	t10	t20
Address, AEN, nBE[3:0]	t9
	Valid
nADS	t8
W/nR	t16	t17A
nCYCLE	t11
Write Data		Valid
nSRDY	t21	t21

Figure 14.8 Synchronous Write Cycle - nVLBUS=0

SMSC LAN91C111 REV C 115 Revision 1.91 (08-18-08)

DATASHEET