10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

Chapter 3 Block Diagrams

The diagram shown in Figure 3.1, "Basic Functional Block Diagram", describes the device basic functional blocks. The SMSC LAN91C111 is a single chip solution for embedded designs with minimal Host and external supporting devices required to implement 10/100 Ethernet connectivity solutions.

The optional Serial EEPROM is used to store information relating to default IO offset parameters as well as which of the Interrupt line are used by the host.

LAN91C111

Host System

 

Ethernet

Internal IEEE 802.3 MII (Media

 

MAC

Independent Interface)

ISA,Embedded

 

Processor

 

 

 

 

 

TX/RX Buffer (8K)

PHY Core

Transformer

RJ45

Serial

EEProm

(Optional)

Minimal LAN91C111

Configuration

Figure 3.1 Basic Functional Block Diagram

SMSC LAN91C111 REV C

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Revision 1.91 (08-18-08)

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