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Datasheet
The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the low byte of the last word is relevant.
The transmit byte count least significant bit will be assumed 0 by the controller regardless of the value written in memory.
DATA AREA - The data area starts at offset 4 of the packet structure and can extend up to 2043 bytes.
The data area contains six bytes of DESTINATION ADDRESS followed by six bytes of SOURCE ADDRESS, followed by a
The 802.3 Frame Length word (Frame Type in Ethernet) is not interpreted by the LAN91C111. It is treated transparently as data both for transmit and receive operations.
CONTROL BYTE - For transmit packets the CONTROL BYTE is written by the CPU as:
X | X | ODD | CRC | 0 | 0 | 0 | 0 |
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ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE. If clear, the number of data bytes is even and the byte before the CONTROL BYTE is not transmitted.
CRC - When set, CRC will be appended to the frame. This bit has meaning only if the NOCRC bit in the TCR is set.
For receive packets the CONTROL BYTE is written by the controller as:
0 | 1 | ODD | 0 | 0 | 0 | 0 | 0 |
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ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE. If clear, the number of data bytes is even and the byte before the CONTROL BYTE should be ignored.
8.2Receive Frame Status
This word is written at the beginning of each receive frame in memory. It is not available as a register.
HIGH | ALGN | BROD | BAD |
| ODD |
| TOOLNG | TOO |
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BYTE | ERR | CAST | CRC |
| FRM |
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| SHORT |
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LOW |
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| HASH VALUE |
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| MULT | ||
BYTE |
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| CAST |
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| Reserved | 5 | 4 |
| 3 |
| 2 | 1 | 0 |
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| ALGNERR - Frame had alignment error. |
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Revision 1.91 |
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| 44 |
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| SMSC LAN91C111 REV C |
DATASHEET