Sun Microsystems 60 service manual Marvin, Cheerio, Psycho+

C.1.15.2 Marvin

The Marvin ASIC provides system control. It controls the UPA interconnect between the major system unit components and main memory. The Marvin ASIC provides the following:

■Interconnect packet receive

■Memory arbiter

■Non-cached arbiter

■Memory controller

■Snoop interface

■Coherence controller

■S_register dispatcher

■Internet packet send

■Datapatch scheduler

■EBus interface

C.1.15.3 Cheerio

The PCI-to-EBus/Ethernet controller (Cheerio) ASIC performs dual roles: PCI bus- to-Ebus bridging and Ethernet control. The Cheerio ASIC provides the electrical connection between the PCI bus and all other I/O functions.

Cheerio also contains an embedded 10/100Mb Ethernet media-access controller to manage Ethernet transactions and provides the electrical connection to slower on- board functions, such as the Flash PROM, TOD/NVRAM, SuperIO, serial ports, SC/RISC, and the audio module.

Cheerio also contains four dedicated DMA channels; parallel port, audio capture, audio playback, and floppy.

C.1.15.4 PSYCHO+

The UPA-to-PCI bridge (PSYCHO+) ASIC provides an I/O connection between the UPA bus and the two PCI buses. The PSYCHO+ ASIC features include:

■Full master and slave port connection to the high-speed UPA interconnect. The UPA is a split address/data packet-switched bus that has a potential data throughput rate of greater than 1 Gbyte per second. UPA data is ECC protected.

■Two physically separate PCI bus segments with full master and slave support:

■66-MHz PCI bus segment (PCI bus A): 3.3-Vdc I/O signaling, 64-bit data bus, compatible with the PCI 66-MHz extensions, support for up to four master devices (at 33 MHz only)

■33-MHz PCI bus segment (PCI bus B): 5.0-Vdc I/O signaling, 64-bit data bus, support for up to six master devices

C-34Sun Ultra 60 Service Manual • August 2001