3.4.1diag-level Variable Set to max
When the
CODE EXAMPLE
Executing Power On SelfTest
0>
0>@(#) Sun Ultra
0>INFO: Processor 0 is master. 0>
0> <00> Init System BSS
0> <00> NVRAM Battery Detect Test 0> <00> NVRAM Scratch Addr Test 0> <00> DMMU TLB Tag Access Test 0> <00> DMMU TLB RAM Access Test 0> <00> IMMU TLB Tag Access Test 0> <00> IMMU TLB RAM Access Test 0> <00> Probe Ecache 0>INFO:CPU 296 MHz: 2048KB Ecache 0> <00> Ecache RAM Addr Test
0> <00> Ecache Tag Addr Test 0> <00> Ecache Tag Test
0> <00> Invalidate Ecache Tags 0>INFO: Processor 2 -
0> <00> SC Address Reg Test
0> <00> SC Reg Index Test 0> <00> SC Regs Test
0> <00> SC Dtag RAM Addr Test 0> <00> SC Cache Size Init 0> <00> SC Dtag RAM Data Test 0> <00> SC Dtag Init
0> <00> Probe Memory 0>INFO:128MB Bank 0 0>INFO: 0MB Bank 1 0>INFO: 0MB Bank 2 0>INFO: 0MB Bank 3
0> <00> Malloc Post Memory
0> <00> Init Post Memory
0> <00> Post Memory Addr Test
0> <00> Map PROM/STACK/NVRAM in DMMU 0> <00>Memory Stack Test
Chapter 3