Glossary-3
PCI Peripheralcomponent interconnect. A high-performance 32- or 64-bit-wide bus
with multiplexed address and data lines.
PCIO PCI-to-EBus/Ethernet controller.An ASIC that bridges the PCI bus to the
EBus,enabling communication between the PCI bus and all miscellaneous I/O
functions, as well as the connection to slower on-board functions.
PCMCIA Personal computer memory card international association.
PID Process ID.
POR Power-on reset.
POST Power-on self-test. A series of tests that verify system boardcomponents are
operating properly.Initialized at system power-on or when the system is
rebooted.
RAMDAC RAM digital-to-analog converter.An ASIC responsible for direct interface to
3DRAM. Also provides on-boardphase-lock loop (PLL) and clock generator
circuitry for the pixel clock.
RC Resistive-capacitive.
RISC Reset,interrupt, scan, and clock. An ASIC responsible for reset, interrupt, scan,
and clock.
RMA Removable media assembly.Can include a CD-ROM drive or 4-mm, 8-mm, a
diskettedrive, and any other 3.5-inch device, such as a second diskette drive or
a peripheral component interconnect (PCI) device.
SB Single buffer.
SCSI Small computer system interface.
SC_UP+ System controller uniprocessorplus. An ASIC that regulates the flow of
requests and data throughoutthe system unit.
STP Shielded twisted-pair.
SunVTS A diagnostic application designed to test hardware.
TPE Twisted-pairEthernet.
TOD Timeof day. A timekeeping intergrated circuit.
TTL Transistor-transistorlogic.
U2P UPA-to-PCI.An ASIC that controls the PCI buses. It forms the bridge from the
UPAbus to the PCI buses.