CODE EXAMPLE 3-1 diag-levelVariable Set to max (Continued)

2> <00>Test 7: prefetcha with asi 0x76 is noped

2> <00>Test 8: prefetch with fcn 5

2> <00>Test 9: prefetch with fcn 2

2> <00>Test 10: prefetch with fcn 12

2> <00>Test 11: prefetch with fcn 16 is noped

2> <00>Test 12: prefetch with fcn 29 is noped

2> <00>Test 13: prefetcha with asi 0x15 is noped

2> <00>Test 14: prefetch with fcn 3

2> <00>Test 15: prefetcha14 with fcn 2

2> <00>Test 16: prefetcha80_mr

2> <00>Test 17: prefetcha81_1r

2> <00>Test 18: prefetcha10_mw

2> <00>Test 19: prefetcha80_17 is noped

2> <00>Test 20: prefetcha10_6: illegal instruction trap

2> <00>Test 21: prefetcha11_1w

2> <00>Test 22: prefetcha81_31

2> <00>Test 23: prefetcha11_15: illegal instruction trap 0>STATUS =PASSED

Power On Selftest Completed

3.4.2diag-levelVariable Set to min

When the diag-levelvariable is set to min, POST enables an abbreviated set of diagnostic-level tests. This mode requires approximately 1 minute and 30 seconds to complete (with 128 Mbytes of DIMM installed). CODE EXAMPLE 3-2identifies a serial port A POST output with the diag-level NVRAM variable set to min.

CODE EXAMPLE 3-2 diag-levelVariable Set to min

Executing Power On SelfTest

0>

0>@(#) Sun Ultra 60(UltraSPARC-II 2-way) UPA/PCI POST x.x.x xx/xx/xxxx xx:xx PM

0>INFO: Processor 0 is master. 0>

0> <00> Init System BSS

0> <00> NVRAM Battery Detect Test 0> <00> NVRAM Scratch Addr Test 0> <00> DMMU TLB Tag Access Test 0> <00> DMMU TLB RAM Access Test 0> <00> IMMU TLB Tag Access Test

3-14Sun Ultra 60 Service Manual • August 2001

Page 48
Image 48
Sun Microsystems 60 service manual Diag-levelVariable Set to min