Chapter 3 Power-On Self-Test 3-11
0> <1f> Streaming DMA CE ECC Rd Err Ebus Test
0> <1f> Streaming DMA CE ECC Rd Err Lpbk Test
0> <1f> Consistent DMA UE ECC Rd Error Ebus Test
0> <1f> Consistent DMA UE ECC R/M/W Err Ebus Test
0> <1f> Consistent DMA UE ECC R/M/W Err Lpbk Test
0> <1f> Consistent DMA CE ECC Rd Err Ebus Test
0> <1f> Consistent DMA CE ECC Rd Err Lpbk Test
0> <1f> Consistent DMA CE ECC R/M/W Err Ebus Test
0> <1f> Consistent DMA CE ECC R/M/W Err Lpbk Test
0> <1f> Consistent DMA Wr Data Parity Err Lpbk Test
0> <1f> Pass-Thru DMA UE ECC Rd Err Ebus Test
0> <1f> Pass-Thru DMA UE ECC R/M/W Err Ebus Test
0> <1f> Pass-Thru DMA UE ECC R/M/W Err Lpbk Test
0> <1f> Pass-Thru DMA CE ECC Rd Err Ebus Test
0> <1f> Pass-Thru DMA CE ECC Rd Err Lpbk Test
0> <1f> Pass-Thru DMA CE ECC R/M/W Err Ebus Test
0> <1f> Pass-Thru DMA CE ECC R/M/W Err Lpbk Test
0> <1f> Pass-Thru DMA Write Data Parity Err, Lpbk Test
0> <1f> Init Psycho
0> <1f> Mondo Generate Interrupt Test
0> <1f> Timer Interrupt Test
0> <1f> Timer Interrupt w/ periodic Test
0> <1f> Psycho Stream Buff A Flush Sync Test
0> <1f> Psycho Stream Buff B Flush Sync Test
0> <1f> Psycho Stream Buff A Flush Invalidate Test
0> <1f> Psycho Stream Buff B Flush Invalidate Test
0> <1f> Psycho Merge Buffer w/ Scache A Test
0> <1f> Psycho Merge Buffer w/ Scache B Test
0> <1f> Consist DMA Rd, IOMMU miss Ebus Test
0> <1f> Consist DMA Rd, IOMMU miss Lpbk Test
0> <1f> Consist DMA Rd, IOMMU hit Ebus Test
0> <1f> Consist DMA Rd, IOMMU hit Lpbk Test
0> <1f> Consist DMA Wr, IOMMU miss Ebus Test
0> <1f> Consist DMA Wr, IOMMU miss Lpbk Test
0> <1f> Consist DMA Wr, IOMMU hit Ebus Test
0> <1f> Consist DMA Wr, IOMMU hit Lpbk Test
0> <1f> Stream DMA Rd, IOMMU miss, Scache Miss Ebus Test
0> <1f> Stream DMA Rd, IOMMU miss, Scache Miss Lpbk Test
0> <1f> Stream DMA Rd, IOMMU hit, Scache Miss Ebus Test
0> <1f> Stream DMA Rd, IOMMU hit, Scache Miss Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache(prev rd) Hit Ebus Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache Hit (prev rd) Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit Ebus Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit (prev rd) Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache Hit(prev wr) Ebus Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache Hit (prev wr) Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit(prev wr) Ebus Test
CODEEXAMPLE 3-1 diag-level VariableSet to max (Continued)