Sundance Technology
ST201
PRELIMINARY draft 2
EXPROMBASEADDRESS
Class | PCI Configuration Registers, Configuration |
Base Address | PCI device configuration header start |
Address Offset | 0x30 |
Access Mode | Read/Write |
Width | 32 bits |
This read/write register allows the system to define the base address for the adapter’s Expansion ROM.
BIT
0
14..1
31..15
BIT NAME
AddressDecodeEn- able
Reserved
RomBaseAddress
BIT DESCRIPTION
When this bit is cleared, the adapter’s Expansion ROM is disabled. Setting this bit causes the adapter to respond to accesses in its config- ured expansion ROM space, if MemorySpace in the ConfigCommand register is also set.
Reserved for future use. Should be set to 0.
The system programs the expansion ROM base address into this field. The access to bit [15] depends on Expansion ROM size setting in Asic- Ctrl register. When ExpRomSize is 0 (32KB ExpRom), bit [15] is written as part of the RomBaseAddress. When ExpRomSize is 1 (64KB ExpRom), bit [15] ignores any write operation.
111
