Sundance Spas ST201 manual Configparm, 0x00, address written to EepromCtrl register

Models: ST201

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Sundance Technology

ST201

PRELIMINARY draft 2

CONFIGPARM

 

Class

EEPROM Data Format

Base Address

0x00, address written to EepromCtrl register

Address Offset

0x00

Access Mode

Read Only

Width

16 bits

This is loaded into the ST201 and controls various hardware functions related to PCI bus operation.

BIT

0

1

2

3

4

5

6

10..7

15..11

BIT NAME

FastBackToBack

Lower1Meg

DisableMemBase

D3ColdPme

D1Support

D2Support

PmeEn

MinGnt

MaxLat

BIT DESCRIPTION

Determines the value for the FastBackToBack bit in the ConfigStatus register.

Provides the value for MemMapType[0] in the MemBaseAddress regis- ter.

When set, disables the MemBaseAddr register. This bit causes Mem- BaseAddr to read back as zeroes, appearing as if it is not implemented by the adapter.

Provides the value returned in bit 15 of the PowerMgmtCap register. This bit, when set, indicates that the adapter is capable of signaling wake from the D3cold state.

Provides the value returned in D1Support and also bit 12 in the Power- MgmtCap register.

Provides the value returned in D2Support and also bit 13 in the Power- MgmtCap register.

When this bit is set, the ST201 is allowed to report wake events on the PMEN signal.

Determines the value returned in bits [4..1] of the MinGnt register.

Determines the value returned in bits [5..1] of the MaxLat register.

ConfigParm has a default value of 2ab0h, but is normally overwritten by the value in EEPROM. The default values specify:

FastBackToBack = 0

Lower1Meg = 0

DisableMemBase = 0

D3ColdPme = 0

D1Support = 1

D2Support = 1

PmeEn = 0

MinGnt = 0101b (2.5 us)

MaxLat = 00101b (2.5 us).

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Page 129
Image 129
Sundance Spas ST201 manual Configparm, 0x00, address written to EepromCtrl register