Sundance Spas ST201 manual Mingnt

Sundance Technology		ST201
MINGNT
Class	PCI Configuration Registers, Configuration
Base Address	PCI device configuration header start
Address Offset	0x3e
Access Mode	Read Only
Width	8 bits

PRELIMINARY draft 2

BIT

7..0

BIT NAME

MinGnt

BIT DESCRIPTION

MinGnt specifies, in 250 ns increments, how long a burst period the adapter requires when operating as a bus master. The value for MinGnt is stored in the ConfigParm word in EEPROM. ST201-based PCI systems return the value 10 in this field. This assumes a 33 MHz bus (30 ns clock period), 1 clock for address phase, 10 clock latency to first data phase, then no wait states for the 64 remaining data phases.

(1 + 10 + 64)30ns = 2.25us, rounded up to 2.5us; 2.5us/250 ns = 10

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