Sundance Technology |
| ST201 | |
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INTERRUPTLINE |
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Class | PCI Configuration Registers, Configuration | ||
Base Address | PCI device configuration header start | ||
Address Offset | 0x3c |
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Access Mode | Read/Write |
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Width | 8 bits |
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PRELIMINARY draft 2
BIT
7..0
BIT NAME
InterruptLine
BIT DESCRIPTION
This register is written by the system to communicate to the device driver which interrupt level is being used for the device. This allows the driver to use the appropriate interrupt vector for its ISR. For 80x86 sys- tems, the value in InterruptLine correspond to the IRQ numbers (0 through 15) of the standard dual 8259 configuration, and the value 255 correspond to “disabled”.
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