Sundance Technology
ST201
PRELIMINARY draft 2
ASICCTRL |
|
Class | EEPROM Data Format |
Base Address | 0x00, address written to EepromCtrl register |
Address Offset | 0x02 |
Access Mode | Read Only |
Width | 16 bits |
This word supplies the value for the least significant byte of the AsicCtrl I/O Register. Bit[15] is loaded into WakePolarity of the WakeEvent I/O Register. They are read automatically by the hardware upon reset to provide default settings for
written by the host system.
BIT | BIT NAME |
0Reserved
1ExpRomSize
2TxLargeEnable
3RxLargeEnable
4ExpRomDisable
5PhySpeed10
6PhySpeed100
7PhyMedia
BIT DESCRIPTION
Reserved for future use. Should be set to 0.
Specifies the size of the Expansion ROM installed on the adapter, as follows:
0 = 32 kB (default after reset)
1 = 64 kB
This read/write bit, when set, enables transmission of frames that are larger than the TxFIFO. Since ST201’s TxFIFO size is 2KB, this bit can be left clear (the reset default).
This read/write bit, when set, enables reception of frames that are larger than the RxFIFO. Since ST201’s RxFIFO size is 2KB, this bit can be left clear (the reset default).
This bit, when set, disables accesses to the
This
This
This
000: undefined
001:
010:
011:
100:undefined
101:
110:
111:
131