Sundance Spas ST201 manual Rxframestatus

Sundance Technology

ST201

PRELIMINARY draft 2

RXFRAMESTATUS

Class	DMA Data Structures, RFD
Base Address	Start of RFD
Address Offset	0x04
Access Mode	Read/Write
Width	32 bits

The second dword in the RFD is ReceiveFrameStatus. At the end of a RxDMA frame transfer, the ST201 writes the value of the RxDMAStatus register into this location in the RFD. The bit definitions for TxFrameStatus for bits[31..29] and [27..0] are identical to the corresponding bits of the I/O Register RxDM- AStatus. Only bit[28] differs between the RFD field RxFrameStatus and the register RxDMAStatus.

BIT

12..0

13

14

15

16

17

18

19

20

BIT NAME

RxDMAFrameLen

Reserved

RxFrameError

RxDMAComplete

RxFIFOOverrun

RxRuntFrame

RxAlignmentError

RxFCSError

RxOversizedFrame

BIT DESCRIPTION

During frame RxDMA, RxDMAFrameLen gives a real-time indication of the number of bytes transferred by RxDMA for the frame. RxDMAFra- meLen is cleared when the ST201 fetches a new RxDMAListPtr, and counts up in steps no larger than a bus master burst. When the frame has been completely transferred by RxDMA, RxDMAFrameLen indi- cates the true frame length, except in the case where the frame is larger than the number of bytes specified in the RxDMA fragments. In this case, the RxDMAOverflow bit will be set.

Reserved for future use. Should be set to 0.

Indicates that an error occurred in the receipt of the frame. The driver should examine bits 16 through 20 to determine the type of error(s). This bit is undefined until RxDMAComplete bit is set.

Indicates that the frame transfer by RxDMA is complete. Unless a RxDMA halt is in effect this bit would normally only remain set momen- tarily (too short for the software to read it) since the hardware will then fetch the next RFD.

Indicates that the hardware was unable to remove data from the RxFIFO quickly enough (most likely because the software failed to free a RFD quickly enough, or kept the ST201 in the RxDMAHalt state for too long). Bytes will be missing from the frame at one or more locations in the frame (unpredictable). This bit is undefined until RxDMACom- plete bit is set.

Indicates that the frame was a runt (less than 60 bytes). Normally such frames are not transferred by RxDMA unless RxEarlyThresh is set to a value less than the actual size of the runt frame, and the RxEarlyEn- able of MacCtrl register must be set. This bit is undefined until RxDMA- Complete bit is set.

Indicates that the frame had an alignment error (bad FCS and dribble bits). This bit is undefined until RxDMAComplete bit is set.

Indicates a FCS checksum error on the frame data. This bit is unde- fined until RxDMAComplete bit is set.

Indicates the frame size was equal to or greater than the value set in the MaxFrameSize register. This bit is undefined until RxDMACom- plete bit is set.

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