Sundance Technology
BIT | BIT NAME |
9RcvFCS
10FIFOLoopback
11 | MACLoopback |
15..12 | Reserved |
16CollisionDetect
17CarrierSense
18TxInProg
19TxError
20Reserved
21StatisticsEnable
22StatisticsDisable
23StatisticsEnabled
24TxEnable
25TxDisable
26TxEnabled
27RxEnable
28RxDisable
29RxEnabled
ST201 |
| PRELIMINARY draft 2 |
|
BIT DESCRIPTION
This bit is set by the host if it is desired for the receive frame’s FCS to be passed to the host as part of the data in the RxFIFO. The state of RcvFCS does not affect the ST201’s checking of the frame’s FCS and its posting of FCS error status. RcvFCS is cleared by a system reset. To avoid confusing the RxFIFO logic, the value of RcvFCS should only be changed when the receiver is disabled and the RxFIFO is empty.
Setting this bit forces data loopback from the TxFIFO directly into the RxFIFO. When using FIFO Loopback mode, it is the software’s respon- sibility to ensure that the proper interframe gap is inserted between frames, to avoid losing data in the receive path. To do this, the soft- ware must not load more than one transmit frame into the TxFIFO at a time. TxReset and RxReset bits in AsicCtrl must be set after changing the value of this bit.
Setting this bit will cause the ST201 to loop back transmissions at the output of the media access controller. TxReset and RxReset bits in AsicCtrl must be set after changing the value of this bit.
Reserved for future use. Should be set to 0.
This
This
A
If a TxUnderrun occurs, this bit is set, indicating that the transmitter needs to be reset with the TxReset.
Reserved for future use. Should be set to 0.
When set, ST201 will collect statistics with the various statistics counters and registers. This bit is
When set, ST201 will stop collection of statistics with the statistics reg- isters. The values in the statistics registers will remain unchanged. This bit is
This
When set, the transmitter logic is enabled. This bit is
When set, the transmitter logic is disabled. This bit is
This
When set, the receiver logic is enabled. This bit is
When set, the receiver logic is disabled. This bit is
This
51