Sundance Technology

ST201

PRELIMINARY draft 2

RXDMALISTPTR

 

Class

I/O Registers, DMA

Base Address

IoBaseAddress register value

Address Offset

0x10

Access Mode

Read/Write

Width

32 bits

RxDMAListPtr holds the physical address of the current RxDMA Frame Descriptor in the RxDMAList. A value of zero in RxDMAListPtr indicates that no more RFDs are available to accept receive frames. RxD- MAListPtr only points to addresses on 8-byte boundaries, so RFDs must be aligned on 8-byte physical address boundaries. RxDMAListPtr is cleared by reset. RxDMAListPtr may be written directly by the host system to point the ST201 to the head of a newly created RxDMAList. RxDMAListPtr is also updated by the ST201 as it processes RFDs in the RxDMAList. As the ST201 finishes processing a RFD, it loads RxD- MAListPtr with the value from RxDMANextPtr to allow it to move on to the next RFD. If the ST201 loads a value of zero from the current RFD, the RxDMA engine enters the idle state, waiting for a non-zero value to be written to RxDMAListPtr. To avoid access conflicts between the ST201 and the host system, the host system must issue a RxDMAHalt before writing to RxDMAListPtr.

BIT

31..0

BIT NAME

RxDMAListPtr

BIT DESCRIPTION

Physical address, on a 8-byte boundary, of the current RFD in the RxDMAList.

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Sundance Spas ST201 manual Rxdmalistptr, Bit