Sundance Spas ST201 manual Rxdmastatus

Sundance Technology

ST201

PRELIMINARY draft 2

RXDMASTATUS
Class	I/O Registers, DMA
Base Address	IoBaseAddress register value
Address Offset	0x0c
Access Mode	Read only
Width	32 bits

RxDMAStatus shows the status of various operations in the RxDMA Logic. Host systems should read this register only while the RxDMA engine is in the RxDMAHalt state. Otherwise the ST201 may change RFDs between accesses to this register. The format of this register is identical to that of the ReceiveFrameStatus field written into each RFD, since the content of this register is written into the RFD upon RxDMA frame completion with the exception of the ImpliedBufferEnable bit, which is not implemented in this register. RxDMAStatus is cleared by a reset.

BIT

12..0

13

14

15

16

17

18

19

BIT NAME

RxDMAFrameLen

Reserved

RxFrameError

RxDMAComplete

RxFIFOOverrun

RxRuntFrame

RxAlignmentError

RxFCSError

BIT DESCRIPTION

During frame RxDMA, RxDMAFrameLen gives a real-time indication of the number of bytes transferred by RxDMA for the frame. RxDMAFra- meLen is cleared when the ST201 fetches a new RxDMAListPtr, and counts up in steps no larger than a bus master burst. When the frame has been completely transferred by RxDMA, RxDMAFrameLen indi- cates the true frame length, except in the case where the frame is larger than the number of bytes specified in the RxDMA fragments. In this case, the RxDMAOverflow bit will be set.

Reserved for future use. Should be set to 0.

Indicates that an error occurred in the receipt of the frame. The driver should examine bits 16 through 20 to determine the type of error(s). This bit is undefined until RxDMAComplete bit is set.

Indicates that the frame transfer by RxDMA is complete. Unless a RxDMA halt is in effect this bit would normally only remain set momen- tarily (too short for the software to read it) since the hardware will then fetch the next RFD.

Indicates that the hardware was unable to remove data from the RxFIFO quickly enough (most likely because the software failed to free a RFD quickly enough, or kept the ST201 in the RxDMAHalt state for too long). Bytes will be missing from the frame at one or more locations in the frame (unpredictable). This bit is undefined until RxDMACom- plete bit is set.

Indicates that the frame was a runt (less than 60 bytes). Normally such frames are not transferred by RxDMA unless RxEarlyThresh is set to a value less than the actual size of the runt frame, and the RxEarlyEn- able of MacCtrl register must be set. This bit is undefined until RxDMA- Complete bit is set.

Indicates that the frame had an alignment error (bad FCS and dribble bits). This bit is undefined until RxDMAComplete bit is set.

Indicates a FCS checksum error on the frame data. This bit is unde- fined until RxDMAComplete bit is set.

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