TNETX3270
ThunderSWITCH 24/3 ETHERNET SWITCH
WITH 24 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS
SPWS043B ± NOVEMBER 1997 ± REVISED APRIL 1999
SDRAM interface (continued)
Table 15. TNETX3270 Terminal Interface to SDRAMs
TERMINALS | SDRAM TERMINAL FUNCTION | ||
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TNETX3270 | SDRAM | ||
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DA13 | A13 | Row/bank address | |
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DA12 | A12 | Row/bank address | |
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DA11 | A11 | Row/bank address | |
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DA10 | A10 | Row | |
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DA09 | A9 | Row address | |
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DA08 | A8 | Row address/column address (⋅ 8 only) | |
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DA07 | A7 | Row address/column address | |
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DA06 | A6 | Row address/column address | |
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DA05 | A5 | Row address/column address | |
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DA04 | A4 | Row address/column address | |
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DA03 | A3 | Row address/column address | |
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DA02 | A2 | Row address/column address | |
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DA01 | A1 | Row address/column address | |
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DA00 | A0 | Row address/column address | |
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DRAS | RAS | Row address strobe | |
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DCAS | CAS | Column address strobe | |
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DW | W | Write enable | |
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DCLK | CLK | Clock | |
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DD31±DD16 | DQ15±DQ0 | SDRAM1. Data I/O (⋅ 16 SDRAMs) | |
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DD15±DD00 | DQ15±DQ0 | SDRAM0 | |
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DD31±DD24 | DQ7±DQ0 | SDRAM3. Data I/O (⋅ 8 SDRAMs) | |
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DD23±DD16 | DQ7±DQ0 | SDRAM2 | |
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DD15±DD08 | DQ7±DQ0 | SDRAM1 | |
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DD07±DD00 | DQ7±DQ0 | SDRAM0 | |
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DA13 and DA12 should be left unconnected if
Table 16. SDRAM Terminals Not Driven by the TNETX3270
HELD | SDRAM | SDRAM | |
TERMINAL | TERMINAL FUNCTION | ||
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Low | CS | Chip select | |
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High | CKE | CLK enable | |
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Low | DQM | Data mask (⋅ 8 SDRAMs) | |
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Low | DQML | Data mask (⋅ 16 SDRAMs) | |
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Low | DQMU | Data mask (⋅ 16 SDRAMs) | |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 | 37 |